Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / supermicro / x6dhr_ig / romstage.c

diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 839be041842c49c21d2784bde242627b5d21be01..794234ea718c60b58ac8e316fd8dc741655ae46f 100644 (file)
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -6,7 +6,6 @@
 #include <cpu/x86/lapic.h>
 #include <stdlib.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
@@ -48,12 +47,6 @@ static void main(unsigned long bist)
        static const struct mem_controller mch[] = {
                {
                        .node_id = 0,
-                       /*
-                       .f0 = PCI_DEV(0, 0x00, 0),
-                       .f1 = PCI_DEV(0, 0x00, 1),
-                       .f2 = PCI_DEV(0, 0x00, 2),
-                       .f3 = PCI_DEV(0, 0x00, 3),
-                       */
                        .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
                        .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
                }
@@ -110,17 +103,4 @@ static void main(unsigned long bist)
        dump_pci_device(PCI_DEV(0, 0x00, 0));
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
-
-#if 0 // temporarily disabled
-       /* Check the first 1M */
-//     ram_check(0x00000000, 0x000100000);
-//     ram_check(0x00000000, 0x000a0000);
-//     ram_check(0x00100000, 0x01000000);
-       ram_check(0x00100000, 0x00100100);
-       /* check the first 1M in the 3rd Gig */
-//     ram_check(0x30100000, 0x31000000);
-#endif
-#if 0
-       ram_check(0x00000000, 0x02000000);
-#endif
 }