This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / mainboard / pcengines / alix1c / cache_as_ram_auto.c

diff --git a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c b/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
index e7a680cd4d4ae45e893b5aea069292d7c7687dfa..472ea10c94bcb4a84fb36cae37913cad745e9f83 100644 (file)
--- a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
+++ b/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
@@ -161,7 +161,7 @@ void cache_as_ram_main(void)
         * It is counting on some early MSR setup for the CS5536.
         */
        cs5536_disable_internal_uart();
-       w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+       w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        mb_gpio_init();
        uart_init();
        console_init();