Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / iei / nova4899r / romstage.c

diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c
index 0900f4ba3eef1e61ce7df632a593ae5e76fdfc55..1d991972937df06313c0ff339f7aa3f73aedc5ed 100644 (file)
--- a/src/mainboard/iei/nova4899r/romstage.c
+++ b/src/mainboard/iei/nova4899r/romstage.c
@@ -25,7 +25,6 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
 #include "southbridge/amd/cs5530/cs5530_enable_rom.c"
 #include "cpu/x86/bist.h"
@@ -42,5 +41,4 @@ static void main(unsigned long bist)
        report_bist_failure(bist);
        cs5530_enable_rom();
        sdram_init();
-       /* ram_check(0x00000000, 640 * 1024); */
 }