We call this cache as ram everywhere, so let's call it the same in Kconfig

[coreboot.git] / src / mainboard / artecgroup / dbe61 / Kconfig

diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig
index 4eab80a388e8bfd9839368d926158db4208cb39c..3997be8856866409eb1e9218feeb55d8c7588057 100644 (file)
--- a/src/mainboard/artecgroup/dbe61/Kconfig
+++ b/src/mainboard/artecgroup/dbe61/Kconfig
@@ -9,7 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
        select HAVE_PIRQ_TABLE
        select PIRQ_ROUTE
        select UDELAY_TSC
-       select USE_DCACHE_RAM
+       select CACHE_AS_RAM
        select BOARD_ROMSIZE_KB_256
 
 config MAINBOARD_DIR