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We call this cache as ram everywhere, so let's call it the same in Kconfig
[coreboot.git]
/
src
/
mainboard
/
amd
/
db800
/
Kconfig
diff --git
a/src/mainboard/amd/db800/Kconfig
b/src/mainboard/amd/db800/Kconfig
index 2755f7c259ad87f960578e911ccf77ede08eed73..006de405e12b19b275f610990a44bfe5499fe2ef 100644
(file)
--- a/
src/mainboard/amd/db800/Kconfig
+++ b/
src/mainboard/amd/db800/Kconfig
@@
-10,7
+10,7
@@
config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_PIRQ_TABLE
select PIRQ_ROUTE
select UDELAY_TSC
- select
USE_DCACHE
_RAM
+ select
CACHE_AS
_RAM
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR