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Add an option to keep the ROM cached after romstage
[coreboot.git]
/
src
/
cpu
/
x86
/
Kconfig
diff --git
a/src/cpu/x86/Kconfig
b/src/cpu/x86/Kconfig
index eed7d8f26f3233cf779e76067306c82f9e34ec4d..68946227b96a30967a5ca935ab460b371feb2683 100644
(file)
--- a/
src/cpu/x86/Kconfig
+++ b/
src/cpu/x86/Kconfig
@@
-27,12
+27,9
@@
config TSC_CALIBRATE_WITH_IO
bool
default n
-config XIP_ROM_BASE
- hex
- default 0xffff0000
-
config XIP_ROM_SIZE
hex
+ default ROM_SIZE if ROMCC
default 0x10000
config CPU_ADDR_BITS
@@
-43,4
+40,6
@@
config LOGICAL_CPUS
bool
default y
-
+config CACHE_ROM
+ bool
+ default n