Remove whitespace.

[coreboot.git] / src / cpu / x86 / 32bit / entry32.inc

diff --git a/src/cpu/x86/32bit/entry32.inc b/src/cpu/x86/32bit/entry32.inc
index 4e0f3b953a3b73b1de84bea8156c28c3b1481c8b..f74e1b87374e2f11af1fa7b7f60e3c17da1d4f1c 100644 (file)
--- a/src/cpu/x86/32bit/entry32.inc
+++ b/src/cpu/x86/32bit/entry32.inc
@@ -1,16 +1,18 @@
 /* For starting coreboot in protected mode */
 
 #include <arch/rom_segs.h>
+#include <cpu/x86/post_code.h>
 
-/*     .section ".rom.text" */
        .code32
 
+
+       /* This is the GDT for the ROM stage part of coreboot. It
+        * is different from the RAM stage GDT which is defined in
+        * c_start.S
+        */
+
        .align  4
 .globl gdtptr
-
-       /* This is the gdt for ROMCC/ASM part of coreboot.
-        * It is different from the gdt in GCC part of coreboot
-        * which is defined in c_start.S */
 gdt:
 gdtptr:
        .word   gdt_end - gdt -1 /* compute the table limit */
@@ -50,7 +52,7 @@ __protected_start:
        /* Save the BIST value */
        movl    %eax, %ebp
 
-       post_code(0x10) /* post 10 */
+       post_code(POST_ENTER_PROTECTED_MODE)
 
        movw    $ROM_DATA_SEG, %ax
        movw    %ax, %ds