libpayload: Add more libpci-compatibility (#defines)
[coreboot.git] / payloads / libpayload / include / pci / pci.h
index 9c7ced8621bcfa5244185ae23da172e403075024..53da0e17560250fd59682c14433917ec967fea20 100644 (file)
 #define PCI_SUBSYSTEM_VENDOR_ID REG_SUBSYS_VENDOR_ID\r
 #define PCI_SUBSYSTEM_ID       REG_SUBSYS_ID\r
 \r
+#define PCI_COMMAND            REG_COMMAND\r
+#define PCI_COMMAND_IO         REG_COMMAND_IO\r
+#define PCI_COMMAND_MEMORY     REG_COMMAND_MEM\r
+#define PCI_COMMAND_MASTER     REG_COMMAND_BM\r
+\r
+#define PCI_HEADER_TYPE                REG_HEADER_TYPE\r
+#define PCI_HEADER_TYPE_NORMAL HEADER_TYPE_NORMAL\r
+#define PCI_HEADER_TYPE_BRIDGE HEADER_TYPE_BRIDGE\r
+#define PCI_HEADER_TYPE_CARDBUS        HEADER_TYPE_CARDBUS\r
+\r
+#define PCI_BASE_ADDRESS_0     0x10\r
+#define PCI_BASE_ADDRESS_1     0x14\r
+#define PCI_BASE_ADDRESS_2     0x18\r
+#define PCI_BASE_ADDRESS_3     0x1c\r
+#define PCI_BASE_ADDRESS_4     0x20\r
+#define PCI_BASE_ADDRESS_5     0x24\r
+#define PCI_BASE_ADDRESS_SPACE 1 // mask\r
+#define PCI_BASE_ADDRESS_SPACE_IO      1\r
+#define PCI_BASE_ADDRESS_SPACE_MEM     0\r
+#define PCI_BASE_ADDRESS_IO_MASK       ~0xf\r
+#define PCI_BASE_ADDRESS_MEM_MASK      ~0x3\r
+\r
+#define PCI_ROM_ADDRESS                0x30\r
+#define PCI_ROM_ADDRESS1       0x38 // on bridges\r
+#define PCI_ROM_ADDRESS_MASK   ~0x7ff\r
+\r
 struct pci_dev {\r
        u16 domain;\r
        u8 bus, dev, func;\r