-/*\r
- * This file is part of the libpayload project.\r
- *\r
- * Copyright (C) 2010 coresystems GmbH\r
- *\r
- * Redistribution and use in source and binary forms, with or without\r
- * modification, are permitted provided that the following conditions\r
- * are met:\r
- * 1. Redistributions of source code must retain the above copyright\r
- * notice, this list of conditions and the following disclaimer.\r
- * 2. Redistributions in binary form must reproduce the above copyright\r
- * notice, this list of conditions and the following disclaimer in the\r
- * documentation and/or other materials provided with the distribution.\r
- * 3. The name of the author may not be used to endorse or promote products\r
- * derived from this software without specific prior written permission.\r
- *\r
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND\r
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\r
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE\r
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS\r
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)\r
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\r
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY\r
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF\r
- * SUCH DAMAGE.\r
- */\r
-\r
-#ifndef _PCI_PCI_H\r
-#define _PCI_PCI_H\r
-\r
-/* we implement at least this version */\r
-#define PCI_LIB_VERSION 0x020200\r
-\r
-#include <pci.h>\r
-\r
-#define PCI_CLASS_DEVICE REG_CLASS_DEV\r
-#define PCI_SUBSYSTEM_VENDOR_ID REG_SUBSYS_VENDOR_ID\r
-#define PCI_SUBSYSTEM_ID REG_SUBSYS_ID\r
-\r
-#define PCI_COMMAND REG_COMMAND\r
-#define PCI_COMMAND_IO REG_COMMAND_IO\r
-#define PCI_COMMAND_MEMORY REG_COMMAND_MEM\r
-#define PCI_COMMAND_MASTER REG_COMMAND_BM\r
-\r
-#define PCI_HEADER_TYPE REG_HEADER_TYPE\r
-#define PCI_HEADER_TYPE_NORMAL HEADER_TYPE_NORMAL\r
-#define PCI_HEADER_TYPE_BRIDGE HEADER_TYPE_BRIDGE\r
-#define PCI_HEADER_TYPE_CARDBUS HEADER_TYPE_CARDBUS\r
-\r
-#define PCI_BASE_ADDRESS_0 0x10\r
-#define PCI_BASE_ADDRESS_1 0x14\r
-#define PCI_BASE_ADDRESS_2 0x18\r
-#define PCI_BASE_ADDRESS_3 0x1c\r
-#define PCI_BASE_ADDRESS_4 0x20\r
-#define PCI_BASE_ADDRESS_5 0x24\r
-#define PCI_BASE_ADDRESS_SPACE 1 // mask\r
-#define PCI_BASE_ADDRESS_SPACE_IO 1\r
-#define PCI_BASE_ADDRESS_SPACE_MEM 0\r
-#define PCI_BASE_ADDRESS_IO_MASK ~0xf\r
-#define PCI_BASE_ADDRESS_MEM_MASK ~0x3\r
-\r
-#define PCI_ROM_ADDRESS 0x30\r
-#define PCI_ROM_ADDRESS1 0x38 // on bridges\r
-#define PCI_ROM_ADDRESS_MASK ~0x7ff\r
-\r
-#define PCI_VENDOR_ID_INTEL 0x8086\r
-\r
-struct pci_dev {\r
- u16 domain;\r
- u8 bus, dev, func;\r
- u16 vendor_id, device_id;\r
- struct pci_dev *next;\r
-};\r
-\r
-/*\r
- * values to match devices against.\r
- * "-1" means "don't care", everything else requires an exact match\r
- */\r
-struct pci_filter {\r
- int domain, bus, dev, func;\r
- int vendor, device;\r
- struct pci_dev *devices;\r
-};\r
-\r
-struct pci_access {\r
- struct pci_dev *devices;\r
-};\r
-\r
-u8 pci_read_byte(struct pci_dev *dev, int pos);\r
-u16 pci_read_word(struct pci_dev *dev, int pos);\r
-u32 pci_read_long(struct pci_dev *dev, int pos);\r
-\r
-int pci_write_byte(struct pci_dev *dev, int pos, u8 data);\r
-int pci_write_word(struct pci_dev *dev, int pos, u16 data);\r
-int pci_write_long(struct pci_dev *dev, int pos, u32 data);\r
-\r
-struct pci_access *pci_alloc(void);\r
-void pci_init(struct pci_access*);\r
-void pci_cleanup(struct pci_access*);\r
-char *pci_filter_parse_slot(struct pci_filter*, const char*);\r
-int pci_filter_match(struct pci_filter*, struct pci_dev*);\r
-void pci_filter_init(struct pci_access*, struct pci_filter*);\r
-void pci_scan_bus(struct pci_access*);\r
-struct pci_dev *pci_get_dev(struct pci_access*, u16, u8, u8, u8);\r
-\r
-#endif\r
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright (C) 2010 coresystems GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PCI_PCI_H
+#define _PCI_PCI_H
+
+/* we implement at least this version */
+#define PCI_LIB_VERSION 0x020200
+
+#include <pci.h>
+
+#define PCI_CLASS_DEVICE REG_CLASS_DEV
+#define PCI_SUBSYSTEM_VENDOR_ID REG_SUBSYS_VENDOR_ID
+#define PCI_SUBSYSTEM_ID REG_SUBSYS_ID
+
+#define PCI_COMMAND REG_COMMAND
+#define PCI_COMMAND_IO REG_COMMAND_IO
+#define PCI_COMMAND_MEMORY REG_COMMAND_MEM
+#define PCI_COMMAND_MASTER REG_COMMAND_BM
+
+#define PCI_HEADER_TYPE REG_HEADER_TYPE
+#define PCI_HEADER_TYPE_NORMAL HEADER_TYPE_NORMAL
+#define PCI_HEADER_TYPE_BRIDGE HEADER_TYPE_BRIDGE
+#define PCI_HEADER_TYPE_CARDBUS HEADER_TYPE_CARDBUS
+
+#define PCI_BASE_ADDRESS_0 0x10
+#define PCI_BASE_ADDRESS_1 0x14
+#define PCI_BASE_ADDRESS_2 0x18
+#define PCI_BASE_ADDRESS_3 0x1c
+#define PCI_BASE_ADDRESS_4 0x20
+#define PCI_BASE_ADDRESS_5 0x24
+#define PCI_BASE_ADDRESS_SPACE 1 // mask
+#define PCI_BASE_ADDRESS_SPACE_IO 1
+#define PCI_BASE_ADDRESS_SPACE_MEM 0
+#define PCI_BASE_ADDRESS_IO_MASK ~0xf
+#define PCI_BASE_ADDRESS_MEM_MASK ~0x3
+
+#define PCI_ROM_ADDRESS 0x30
+#define PCI_ROM_ADDRESS1 0x38 // on bridges
+#define PCI_ROM_ADDRESS_MASK ~0x7ff
+
+#define PCI_VENDOR_ID_INTEL 0x8086
+
+struct pci_dev {
+ u16 domain;
+ u8 bus, dev, func;
+ u16 vendor_id, device_id;
+ struct pci_dev *next;
+};
+
+/*
+ * values to match devices against.
+ * "-1" means "don't care", everything else requires an exact match
+ */
+struct pci_filter {
+ int domain, bus, dev, func;
+ int vendor, device;
+ struct pci_dev *devices;
+};
+
+struct pci_access {
+ struct pci_dev *devices;
+};
+
+u8 pci_read_byte(struct pci_dev *dev, int pos);
+u16 pci_read_word(struct pci_dev *dev, int pos);
+u32 pci_read_long(struct pci_dev *dev, int pos);
+
+int pci_write_byte(struct pci_dev *dev, int pos, u8 data);
+int pci_write_word(struct pci_dev *dev, int pos, u16 data);
+int pci_write_long(struct pci_dev *dev, int pos, u32 data);
+
+struct pci_access *pci_alloc(void);
+void pci_init(struct pci_access*);
+void pci_cleanup(struct pci_access*);
+char *pci_filter_parse_slot(struct pci_filter*, const char*);
+int pci_filter_match(struct pci_filter*, struct pci_dev*);
+void pci_filter_init(struct pci_access*, struct pci_filter*);
+void pci_scan_bus(struct pci_access*);
+struct pci_dev *pci_get_dev(struct pci_access*, u16, u8, u8, u8);
+
+#endif
projects / coreboot.git / blobdiff