2 * This file is part of the coreboot project.
4 * Copyright (C) 2001 Ronald G. Minnich
5 * Copyright (C) 2005 Nick.Barker9@btinternet.com
6 * Copyright (C) 2007-2009 coresystems GmbH
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
22 #include <device/pci.h>
23 #include <device/pci_ids.h>
24 #include <device/pci_ops.h>
26 #include <console/console.h>
28 #include <arch/registers.h>
29 #define printk(x...) do_printk(x)
32 PCIBIOS_CHECK = 0xb101,
33 PCIBIOS_FINDDEV = 0xb102,
34 PCIBIOS_READCONFBYTE = 0xb108,
35 PCIBIOS_READCONFWORD = 0xb109,
36 PCIBIOS_READCONFDWORD = 0xb10a,
37 PCIBIOS_WRITECONFBYTE = 0xb10b,
38 PCIBIOS_WRITECONFWORD = 0xb10c,
39 PCIBIOS_WRITECONFDWORD = 0xb10d
42 // errors go in AH. Just set these up so that word assigns
45 PCIBIOS_SUCCESSFUL = 0x0000,
46 PCIBIOS_UNSUPPORTED = 0x8100,
47 PCIBIOS_BADVENDOR = 0x8300,
48 PCIBIOS_NODEV = 0x8600,
49 PCIBIOS_BADREG = 0x8700
52 int int12_handler(struct eregs *regs);
53 int int1a_handler(struct eregs *regs);
54 int int15_handler(struct eregs *regs);
56 int int12_handler(struct eregs *regs)
58 regs->eax = 64 * 1024;
62 int int1a_handler(struct eregs *regs)
64 unsigned short func = (unsigned short)regs->eax;
66 unsigned short devid, vendorid, devfn;
67 /* Use short to get rid of gabage in upper half of 32-bit register */
77 regs->edx = 0x20494350; /* ' ICP' */
78 regs->edi = 0x00000000; /* protected mode entry */
86 while ((dev = dev_find_device(vendorid, devid, dev))) {
92 unsigned short busdevfn;
94 // busnum is an unsigned char;
95 // devfn is an int, so we mask it off.
96 busdevfn = (dev->bus->secondary << 8)
97 | (dev->path.pci.devfn & 0xff);
98 printk(BIOS_DEBUG, "0x%x: return 0x%x\n", func, busdevfn);
102 regs->eax = PCIBIOS_NODEV;
106 case PCIBIOS_READCONFDWORD:
107 case PCIBIOS_READCONFWORD:
108 case PCIBIOS_READCONFBYTE:
109 case PCIBIOS_WRITECONFDWORD:
110 case PCIBIOS_WRITECONFWORD:
111 case PCIBIOS_WRITECONFBYTE:
112 devfn = regs->ebx & 0xff;
113 bus = regs->ebx >> 8;
115 dev = dev_find_slot(bus, devfn);
117 printk(BIOS_DEBUG, "0x%x: BAD DEVICE bus %d devfn 0x%x\n", func, bus, devfn);
118 // idiots. the pcibios guys assumed you'd never pass a bad bus/devfn!
119 regs->eax = PCIBIOS_BADREG;
124 case PCIBIOS_READCONFBYTE:
125 byte = pci_read_config8(dev, reg);
128 case PCIBIOS_READCONFWORD:
129 word = pci_read_config16(dev, reg);
132 case PCIBIOS_READCONFDWORD:
133 dword = pci_read_config32(dev, reg);
136 case PCIBIOS_WRITECONFBYTE:
138 pci_write_config8(dev, reg, byte);
140 case PCIBIOS_WRITECONFWORD:
142 pci_write_config16(dev, reg, word);
144 case PCIBIOS_WRITECONFDWORD:
146 pci_write_config32(dev, reg, dword);
150 printk(BIOS_DEBUG, "0x%x: bus %d devfn 0x%x reg 0x%x val 0x%x\n",
151 func, bus, devfn, reg, regs->ecx);
156 printk(BIOS_ERR, "UNSUPPORTED PCIBIOS FUNCTION 0x%x\n", func);
164 int int15_handler(struct eregs *regs)
168 /* This int15 handler is VIA Tech. specific. Other chipsets need other
169 * handlers. The right way to do this is to move this handler code into
170 * the mainboard or northbridge code.
172 switch (regs->eax & 0xffff) {
177 // MCLK = 133, 32M frame buffer, 256 M main memory
187 regs->ecx = (regs->ecx & 0xffffff00 ) | 2; // panel type = 2 = 1024 * 768
192 regs->ebx = (regs->ebx & 0xffff0000) | 2;
193 regs->ecx = (regs->ecx & 0xffff0000) | 0x401; // PAL + crt only
194 regs->edx = (regs->edx & 0xffff0000) | 0; // TV Layout - default
200 /* And now Intel IGD code */
201 #define BOOT_DISPLAY_DEFAULT 0
202 #define BOOT_DISPLAY_CRT (1 << 0)
203 #define BOOT_DISPLAY_TV (1 << 1)
204 #define BOOT_DISPLAY_EFP (1 << 2)
205 #define BOOT_DISPLAY_LCD (1 << 3)
206 #define BOOT_DISPLAY_CRT2 (1 << 4)
207 #define BOOT_DISPLAY_TV2 (1 << 5)
208 #define BOOT_DISPLAY_EFP2 (1 << 6)
209 #define BOOT_DISPLAY_LCD2 (1 << 7)
213 regs->ecx = BOOT_DISPLAY_DEFAULT;
218 regs->ecx = 3; // This is mainboard specific
219 printk(BIOS_DEBUG, "DISPLAY=%x\n", regs->ecx);
223 printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n",