util/superiotool/winbond.c

   1 /*
   2  * This file is part of the superiotool project.
   3  *
   4  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19  */
  20
  21 #include "superiotool.h"
  22
  23 #define DEVICE_ID_REG_OLD       0x09
  24
  25 #define DEVICE_ID_REG           0x20
  26 #define DEVICE_REV_REG          0x21
  27
  28 /**
  29  * The ID entries must be in 0xYYZ format, where YY is the device ID,
  30  * and Z is bits 7..4 of the device revision register. We do not match
  31  * bits 3..0 of the device revision here (at least for newer Super I/Os).
  32  *
  33  * But some of the older versions use both bytes (0x20 and 0x21), where
  34  * register 0x21 holds the ID and the full 8 bits of 0x21 hold the revision.
  35  *
  36  * Some other Super I/Os only use bits 3..0 of 0x09 as ID.
  37  */
  38 const static struct superio_registers reg_table[] = {
  39         {0x527, "W83977CTF", {
  40                 {EOT}}},
  41         {0x52f, "W83977EF/EG", {
  42                 {EOT}}},
  43         {0x595, "W83627SF", {
  44                 {EOT}}},
  45         {0x601, "W83697HF/F/HG", { /* No G version? */
  46                 {NOLDN, NULL,
  47                         {0x07,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,
  48                          0x2a,EOT},
  49                         {NANA,0x60,NANA,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
  50                          MISC,EOT}},
  51                 /* Some register defaults depend on the value of PNPCSV. */
  52                 {0x0, "Floppy",
  53                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
  54                          0xf5,EOT},
  55                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
  56                          0x00,EOT}},
  57                 {0x1, "Parallel port",
  58                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
  59                         {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
  60                 {0x2, "COM1",
  61                         {0x30,0x60,0x61,0x70,0xf0,EOT},
  62                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
  63                 {0x3, "COM2",
  64                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
  65                         {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
  66                 {0x6, "Consumer IR",
  67                         {0x30,0x60,0x61,0x70,EOT},
  68                         {0x00,0x00,0x00,0x00,EOT}},
  69                 {0x7, "Game port, GPIO 1",
  70                         {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
  71                         {0x00,0x02,0x01,0x00,0x00,0xff,0x00,0x00,EOT}},
  72                 {0x8, "MIDI port, GPIO 5",
  73                         {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
  74                          0xf4,0xf5,EOT},
  75                         {0x00,0x03,0x30,0x00,0x00,0x09,0xff,0x00,0x00,0x00,
  76                          0x00,0x00,EOT}},
  77                 {0x9, "GPIO 2, GPIO 3, GPIO 4",
  78                         {0x30,0x60,0x61,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
  79                          0xf7,0xf8,0xf5,EOT},
  80                         {0x00,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,
  81                          0x00,0x00,0x00,EOT}},
  82                 {0xa, "ACPI",
  83                         {0x30,0x70,0xe0,0xe1,0xe2,0xe5,0xe6,0xe7,
  84                          0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,EOT},
  85                         {0x00,0x00,0x00,0x00,NANA,0x00,0x00,0x00,
  86                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
  87                 {0xb, "Hardware monitor",
  88                         {0x30,0x60,0x61,0x70,EOT},
  89                         {0x00,0x00,0x00,0x00,EOT}},
  90                 {EOT}}},
  91         {0x610, "W83L517D/D-F", {
  92                 {EOT}}},
  93         {0x681, "W83697UF/UG", {
  94                 {EOT}}},
  95         {0x708, "W83637HF", {
  96                 {EOT}}},
  97         {0x828, "W83627THF/THG", { /* We assume rev is bits 3..0 of 0x21. */
  98                 {EOT}}},
  99         {0x886, "W83627EHF/EF/EHG/EG", {
 100                 {NOLDN, NULL,
 101                         {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
 102                          0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
 103                         {0x88,MISC,0xff,0x00,MISC,0x00,MISC,RSVD,0x50,
 104                          0x04,0x00,RSVD,0x00,0x21,0x00,0x00,EOT}},
 105                 {0x0, "Floppy",
 106                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
 107                          0xf5,EOT},
 108                         {0x01,0x03,0xf0,0x06,0x02,0x8e,0x00,0xff,0x00,
 109                          0x00,EOT}},
 110                 {0x1, "Parallel port",
 111                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
 112                         {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
 113                 {0x2, "COM1",
 114                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 115                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
 116                 {0x3, "COM2",
 117                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
 118                         {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
 119                 {0x5, "Keyboard",
 120                         {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
 121                         {0x01,0x00,0x60,0x00,0x64,0x01,0x0c,0x83,EOT}},
 122                 {0x6, "Serial flash interface",
 123                         {0x30,0x62,0x63,EOT},
 124                         {0x00,0x00,0x00,EOT}},
 125                 {0x7, "GPIO 1, GPIO 6, game port, MIDI port",
 126                         {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
 127                          0xf4,0xf5,0xf6,0xf7,EOT},
 128                         {0x00,0x02,0x01,0x03,0x30,0x09,0xff,0x00,0x00,0x00,
 129                          0xff,0x00,0x00,0x00,EOT}},
 130                 {0x8, "WDTO#, PLED",
 131                         {0x30,0xf5,0xf6,0xf7,EOT},
 132                         {0x00,0x00,0x00,0x00,EOT}},
 133                 {0x9, "GPIO 2, GPIO 3, GPIO 4, GPIO 5, SUSLED",
 134                         {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xf0,0xf1,0xf2,
 135                          0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
 136                         {0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,
 137                          0x00,0xff,0x00,0x00,0x00,EOT}},
 138                 {0xa, "ACPI",
 139                         {0x30,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
 140                          0xe8,0xf2,0xf3,0xf4,0xf6,0xf7,EOT},
 141                         {0x00,0x00,0x01,0x00,0xff,0x08,0x00,RSVD,0x00,0x00,
 142                          RSVD,0x7c,0x00,0x00,0x00,0x00,EOT}},
 143                 {0xb, "Hardware monitor",
 144                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
 145                         {0x00,0x00,0x00,0x00,0xc1,0x00,EOT}},
 146                 {EOT}}},
 147         {0xa23, "W83627UHG", {
 148                 {EOT}}},
 149         {0x9771, "W83977F-A/G-A/AF-A/AG-A", {
 150                 {EOT}}},
 151         {0x9773, "W83977TF", {
 152                 {EOT}}},
 153         {0x9774, "W83977ATF", {
 154                 {EOT}}},
 155         {0x52, "W83627HF/F/HG/G", {
 156                 {EOT}}},
 157         {0xa, "W83877F", {
 158                 {EOT}}},
 159         {0xc, "W83877TF", {
 160                 {EOT}}},
 161         {0xd, "W83877ATF", {
 162                 {EOT}}},
 163         {EOT}
 164 };
 165
 166 static void enter_conf_mode_winbond_88(uint16_t port)
 167 {
 168         outb(0x88, port);
 169 }
 170
 171 static void enter_conf_mode_winbond_89(uint16_t port)
 172 {
 173         outb(0x89, port);
 174 }
 175
 176 static void enter_conf_mode_winbond_86(uint16_t port)
 177 {
 178         outb(0x86, port);
 179         outb(0x86, port);
 180 }
 181
 182 void probe_idregs_winbond_helper(const char *init, uint16_t port)
 183 {
 184         uint16_t id;
 185         uint8_t devid, rev, olddevid;
 186
 187         devid = regval(port, DEVICE_ID_REG);
 188         rev = regval(port, DEVICE_REV_REG);
 189         olddevid = regval(port, DEVICE_ID_REG_OLD);
 190
 191         if (devid == 0x52)
 192                 id = devid;                              /* ID only */
 193         else if ((devid == 0x97) && ((rev & 0xf0) == 7))
 194                 id = (devid << 8) | rev;                 /* ID and rev */
 195         else
 196                 id = (devid << 4) | ((rev & 0xf0) >> 4); /* ID and rev[3..0] */
 197
 198         if (olddevid == 0x0a || olddevid == 0x0c || olddevid == 0x0d)
 199                 id = olddevid & 0x0f;                    /* ID[3..0] */
 200
 201         if (superio_unknown(reg_table, id)) {
 202                 no_superio_found("Winbond", init, port);
 203                 exit_conf_mode_winbond_fintek_ite_8787(port);
 204                 return;
 205         }
 206
 207         if (olddevid == 0x0a || olddevid == 0x0c || olddevid == 0x0d)
 208                 printf("Found Winbond %s (id=0x%02x) at 0x%x\n",
 209                        get_superio_name(reg_table, id), olddevid, port);
 210         else
 211                 printf("Found Winbond %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
 212                        get_superio_name(reg_table, id), devid, rev, port);
 213
 214         /* TODO: Special notes in dump output for the MISC entries. */
 215         dump_superio("Winbond", reg_table, port, id);
 216         dump_superio_readable(port); /* TODO */
 217 }
 218
 219 void probe_idregs_winbond(uint16_t port)
 220 {
 221         /* TODO: Not all init sequences are valid for all ports. */
 222
 223         enter_conf_mode_winbond_88(port);
 224         probe_idregs_winbond_helper("(init=0x88) ", port);
 225         exit_conf_mode_winbond_fintek_ite_8787(port);
 226
 227         enter_conf_mode_winbond_89(port);
 228         probe_idregs_winbond_helper("(init=0x89) ", port);
 229         exit_conf_mode_winbond_fintek_ite_8787(port);
 230
 231         enter_conf_mode_winbond_86(port);
 232         probe_idregs_winbond_helper("(init=0x86,0x86) ", port);
 233         exit_conf_mode_winbond_fintek_ite_8787(port);
 234
 235         enter_conf_mode_winbond_fintek_ite_8787(port);
 236         probe_idregs_winbond_helper("(init=0x87,0x87) ", port);
 237         exit_conf_mode_winbond_fintek_ite_8787(port);
 238 }
 239