Superiotool: Add dump support to the Winbond W83697HF/F.
[coreboot.git] / util / superiotool / winbond.c
1 /*
2  * This file is part of the LinuxBIOS project.
3  *
4  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
19  */
20
21 #include "superiotool.h"
22
23 #define DEVICE_ID_REG   0x20
24 #define DEVICE_REV_REG  0x21
25
26 /**
27  * The ID entries must be in 0xYYZ format, where YY is the device ID,
28  * and Z is bits 7..4 of the device revision register. We do not match
29  * bits 3..0 of the device revision here.
30  */
31 const static struct superio_registers reg_table[] = {
32         {0x601, "W83697HF/F", {
33                 {NOLDN, NULL,
34                         /* TODO: 0x02, 0x07. */
35                         {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,
36                          0x2a,EOT},
37                         {0x60,NANA,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
38                          MISC,EOT}},
39                 /* Some register defaults depend on the value of PNPCSV. */
40                 {0x0, "Floppy",
41                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
42                          0xf5,EOT},
43                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
44                          0x00,EOT}},
45                 {0x1, "Parallel port",
46                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
47                         {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
48                 {0x2, "COM1",
49                         {0x30,0x60,0x61,0x70,0xf0,EOT},
50                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
51                 {0x3, "COM2",
52                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
53                         {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
54                 {0x6, "CIR",
55                         {0x30,0x60,0x61,0x70,EOT},
56                         {0x00,0x00,0x00,0x00,EOT}},
57                 {0x7, "Game port, GPIO port 1",
58                         {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
59                         {0x00,0x02,0x01,0x00,0x00,0xff,0x00,0x00,EOT}},
60                 {0x8, "MIDI port, GPIO port 5",
61                         {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
62                          0xf4,0xf5,EOT},
63                         {0x00,0x03,0x30,0x00,0x00,0x09,0xff,0x00,0x00,0x00,
64                          0x00,0x00,EOT}},
65                 {0x9, "GPIO port 2, 3, and 4",
66                         {0x30,0x60,0x61,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
67                          0xf7,0xf8,0xf5,EOT},
68                         {0x00,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,
69                          0x00,0x00,0x00,EOT}},
70                 {0xa, "ACPI",
71                         {0x30,0x70,0xe0,0xe1,0xe2,0xe5,0xe6,0xe7,
72                          0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,EOT},
73                         {0x00,0x00,0x00,0x00,NANA,0x00,0x00,0x00,
74                          0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
75                 {0xb, "Hardware monitor",
76                         {0x30,0x60,0x61,0x70,EOT},
77                         {0x00,0x00,0x00,0x00,EOT}},
78                 {EOT}}},
79         {0x886, "W83627EHF/EF/EHG/EG", {
80                 {NOLDN, NULL,
81                         {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
82                          0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
83                         {0x88,NANA,0xff,0x00,MISC,0x00,MISC,RSVD,0x50,
84                          0x04,0x00,RSVD,0x00,0x21,0x00,0x00,EOT}},
85                 {0x0, NULL,
86                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
87                          0xf5,EOT},
88                         {0x01,0x03,0xf0,0x06,0x02,0x8e,0x00,0xff,0x00,
89                          0x00,EOT}},
90                 {0x1, NULL,
91                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
92                         {0x01,0x03,0x78,0x07,0x04,0x3f,EOT}},
93                 {0x2, NULL,
94                         {0x30,0x60,0x61,0x70,0xf0,EOT},
95                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
96                 {0x3, NULL,
97                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
98                         {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
99                 {0x5, NULL,
100                         {0x30,0x60,0x61,0x62,0x63,0x70,0x72,0xf0,EOT},
101                         {0x01,0x00,0x60,0x00,0x64,0x01,0x0c,0x83,EOT}},
102                 {0x6, NULL,
103                         {0x30,0x62,0x63,EOT},
104                         {0x00,0x00,0x00,EOT}},
105                 {0x7, NULL,
106                         {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
107                          0xf4,0xf5,0xf6,0xf7,EOT},
108                         {0x00,0x02,0x01,0x03,0x30,0x09,0xff,0x00,0x00,0x00,
109                          0xff,0x00,0x00,0x00,EOT}},
110                 {0x8, NULL,
111                         {0x30,0xf5,0xf6,0xf7,EOT},
112                         {0x00,0x00,0x00,0x00,EOT}},
113                 {0x9, NULL,
114                         {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xf0,0xf1,0xf2,
115                          0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
116                         {0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,
117                          0x00,0xff,0x00,0x00,0x00,EOT}},
118                 {0xa, NULL,
119                         {0x30,0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,
120                          0xe8,0xf2,0xf3,0xf4,0xf6,0xf7,EOT},
121                         {0x00,0x00,0x01,0x00,0xff,0x08,0x00,RSVD,0x00,0x00,
122                          RSVD,0x7c,0x00,0x00,0x00,0x00,EOT}},
123                 {0xb, NULL,
124                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
125                         {0x00,0x00,0x00,0x00,0xc1,0x00,EOT}},
126                 {EOT}}},
127         {EOT}
128 };
129
130 static void enter_conf_mode_winbond(uint16_t port)
131 {
132         outb(0x87, port);
133         outb(0x87, port);
134 }
135
136 static void exit_conf_mode_winbond(uint16_t port)
137 {
138         outb(0xaa, port);
139 }
140
141 void probe_idregs_winbond(uint16_t port)
142 {
143         uint16_t id;
144         uint8_t devid, rev;
145
146         enter_conf_mode_winbond(port);
147
148         devid = regval(port, DEVICE_ID_REG);
149         rev = regval(port, DEVICE_REV_REG);
150
151         /* Bits 3..0 of 'rev' form the IC version, we don't match that. */
152         id = (devid << 4) | ((rev & 0xf0) >> 4);
153
154         if (superio_unknown(reg_table, id)) {
155                 no_superio_found(port);
156                 return;
157         }
158
159         printf("Found Winbond %s (id=0x%02x, rev=0x%02x) at 0x%x\n",
160                get_superio_name(reg_table, id), devid, rev, port);
161
162         /* TODO: Special notes in dump output for the MISC entries. */
163         dump_superio("Winbond", reg_table, port, id);
164
165         exit_conf_mode_winbond(port);
166 }
167