Dump support for the Fintek F71805 (trivial).
[coreboot.git] / util / superiotool / fintek.c
1 /*
2  * This file is part of the LinuxBIOS project.
3  *
4  * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
19  */
20
21 #include "superiotool.h"
22
23 #define DEVICE_ID_BYTE1_REG     0x20
24 #define DEVICE_ID_BYTE2_REG     0x21
25 #define VENDOR_ID_BYTE1_REG     0x23
26 #define VENDOR_ID_BYTE2_REG     0x24
27
28 #define FINTEK_VENDOR_ID        0x3419
29
30 const static struct superio_registers reg_table[] = {
31         {0x0604, "F71805", {
32                 /* We assume reserved bits are read as 0. */
33                 {NOLDN, NULL,
34                         {0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
35                          0x29,EOT},
36                         {NANA,0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,
37                          0x00,EOT}},
38                 {0x0, "Floppy",
39                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
40                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
41                 {0x1, "COM1",
42                         {0x30,0x60,0x61,0x70,0xf0,EOT},
43                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
44                 {0x2, "COM2",
45                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
46                         {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
47                 {0x3, "Parallel port",
48                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
49                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
50                 {0x4, "Hardware monitor",
51                         {0x30,0x60,0x61,0x70,EOT},
52                         {0x00,0x02,0x95,0x00,EOT}},
53                 {0x6, "GPIO",
54                         {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
55                          0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
56                         {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
57                          0x00,0x00,NANA,0x00,NANA,EOT}},
58                 {0xa, "PME",
59                         {0x30,0xf0,0xf1,EOT},
60                         {0x00,0x00,0x00,EOT}},
61                 {EOT}}},
62         {0x4103, "F71872", {
63                 {EOT}}},
64         {EOT}
65 };
66
67 static void dump_readable_fintek(uint16_t port, uint16_t did)
68 {
69         if (!dump_readable)
70                 return;
71
72         printf("Human-readable register dump:\n");
73
74         printf("Flash write is %s.\n",
75                regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
76         printf("Flash control is 0x%04x.\n", regval(port, 0x28));
77         printf("27=%02x\n", regval(port, 0x27));
78         printf("29=%02x\n", regval(port, 0x29));
79         printf("2a=%02x\n", regval(port, 0x2a));
80         printf("2b=%02x\n", regval(port, 0x2b));
81
82         /* Select UART 1. */
83         regwrite(port, 0x07, 0x01);
84         printf("UART1 is %s\n",
85                regval(port, 0x30) & 1 ? "enabled" : "disabled");
86         printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
87                regval(port, 0x61), regval(port, 0x70) & 0x0f,
88                regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
89
90         /* Select UART 2. */
91         regwrite(port, 0x07, 0x02);
92         printf("UART2 is %s\n",
93                regval(port, 0x30) & 1 ? "enabled" : "disabled");
94         printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
95                regval(port, 0x61), regval(port, 0x70) & 0x0f,
96                regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
97
98         /* Select parallel port. */
99         regwrite(port, 0x07, 0x03);
100         printf("PARPORT is %s\n",
101                regval(port, 0x30) & 1 ? "enabled" : "disabled");
102         printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60),
103                regval(port, 0x61), regval(port, 0x70) & 0x0f);
104
105         /* Select HW monitor. */
106         regwrite(port, 0x07, 0x04);
107         printf("HW monitor is %s\n",
108                regval(port, 0x30) & 1 ? "enabled" : "disabled");
109         printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60),
110                regval(port, 0x61), regval(port, 0x70) & 0x0f);
111
112         /* Select GPIO. */
113         regwrite(port, 0x07, 0x05);
114         printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
115         printf
116             ("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
117              regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1),
118              regval(port, 0xe2), regval(port, 0xe3), regval(port, 0xe4),
119              regval(port, 0xe5));
120         printf
121             ("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
122              regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8),
123              regval(port, 0xe9), regval(port, 0xf0), regval(port, 0xf1),
124              regval(port, 0xf3), regval(port, 0xf4));
125         printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n", regval(port, 0xf5),
126                regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
127 }
128
129 void probe_idregs_fintek(uint16_t port)
130 {
131         uint16_t vid, did;
132
133         enter_conf_mode_winbond_fintek_ite_8787(port);
134
135         did = regval(port, DEVICE_ID_BYTE1_REG);
136         did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
137
138         vid = regval(port, VENDOR_ID_BYTE1_REG);
139         vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
140
141         if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
142                 no_superio_found(port);
143                 exit_conf_mode_winbond_fintek_ite_8787(port);
144                 return;
145         }
146
147         printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at port=0x%x\n",
148                get_superio_name(reg_table, did), vid, did, port);
149
150         dump_superio("Fintek", reg_table, port, did);
151         dump_readable_fintek(port, did);
152
153         exit_conf_mode_winbond_fintek_ite_8787(port);
154 }
155