* Convert the NSC code to the common code structure all other Super I/Os use.
[coreboot.git] / util / superiotool / fintek.c
1 /*
2  * This file is part of the superiotool project.
3  *
4  * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5  * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
20  */
21
22 #include "superiotool.h"
23
24 #define DEVICE_ID_BYTE1_REG     0x20
25 #define DEVICE_ID_BYTE2_REG     0x21
26
27 #define VENDOR_ID_BYTE1_REG     0x23
28 #define VENDOR_ID_BYTE2_REG     0x24
29
30 #define FINTEK_VENDOR_ID        0x3419
31
32 const static struct superio_registers reg_table[] = {
33         {0x0106, "F71862FG", {
34                 {EOT}}},
35         {0x4103, "F71872F/FG / F71806F/FG", {   /* Same ID? Datasheet typo? */
36                 {EOT}}},
37         {0x4105, "F71882FG/F71883FG", {         /* Same ID? Datasheet typo? */
38                 {EOT}}},
39         {0x0604, "F71805F/FG", {
40                 /* We assume reserved bits are read as 0. */
41                 {NOLDN, NULL,
42                         {0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
43                          0x29,EOT},
44                         {NANA,0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,
45                          0x00,EOT}},
46                 {0x0, "Floppy",
47                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
48                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
49                 {0x1, "COM1",
50                         {0x30,0x60,0x61,0x70,0xf0,EOT},
51                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
52                 {0x2, "COM2",
53                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
54                         {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
55                 {0x3, "Parallel port",
56                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
57                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
58                 {0x4, "Hardware monitor",
59                         {0x30,0x60,0x61,0x70,EOT},
60                         {0x00,0x02,0x95,0x00,EOT}},
61                 {0x6, "GPIO",
62                         {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
63                          0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
64                         {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
65                          0x00,0x00,NANA,0x00,NANA,EOT}},
66                 {0xa, "PME",
67                         {0x30,0xf0,0xf1,EOT},
68                         {0x00,0x00,0x00,EOT}},
69                 {EOT}}},
70         {EOT}
71 };
72
73 static void dump_readable_fintek(uint16_t port, uint16_t did)
74 {
75         if (!dump_readable)
76                 return;
77
78         printf("Human-readable register dump:\n");
79
80         printf("Flash write is %s.\n",
81                regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
82         printf("Flash control is 0x%04x.\n", regval(port, 0x28));
83         printf("27=%02x\n", regval(port, 0x27));
84         printf("29=%02x\n", regval(port, 0x29));
85         printf("2a=%02x\n", regval(port, 0x2a));
86         printf("2b=%02x\n", regval(port, 0x2b));
87
88         /* Select UART 1. */
89         regwrite(port, 0x07, 0x01);
90         printf("UART1 is %s\n",
91                regval(port, 0x30) & 1 ? "enabled" : "disabled");
92         printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
93                regval(port, 0x61), regval(port, 0x70) & 0x0f,
94                regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
95
96         /* Select UART 2. */
97         regwrite(port, 0x07, 0x02);
98         printf("UART2 is %s\n",
99                regval(port, 0x30) & 1 ? "enabled" : "disabled");
100         printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
101                regval(port, 0x61), regval(port, 0x70) & 0x0f,
102                regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
103
104         /* Select parallel port. */
105         regwrite(port, 0x07, 0x03);
106         printf("PARPORT is %s\n",
107                regval(port, 0x30) & 1 ? "enabled" : "disabled");
108         printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60),
109                regval(port, 0x61), regval(port, 0x70) & 0x0f);
110
111         /* Select HW monitor. */
112         regwrite(port, 0x07, 0x04);
113         printf("HW monitor is %s\n",
114                regval(port, 0x30) & 1 ? "enabled" : "disabled");
115         printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60),
116                regval(port, 0x61), regval(port, 0x70) & 0x0f);
117
118         /* Select GPIO. */
119         regwrite(port, 0x07, 0x05);
120         printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
121         printf
122             ("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
123              regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1),
124              regval(port, 0xe2), regval(port, 0xe3), regval(port, 0xe4),
125              regval(port, 0xe5));
126         printf
127             ("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
128              regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8),
129              regval(port, 0xe9), regval(port, 0xf0), regval(port, 0xf1),
130              regval(port, 0xf3), regval(port, 0xf4));
131         printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n", regval(port, 0xf5),
132                regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
133 }
134
135 void probe_idregs_fintek(uint16_t port)
136 {
137         uint16_t vid, did;
138
139         probing_for("Fintek", "", port);
140
141         enter_conf_mode_winbond_fintek_ite_8787(port);
142
143         did = regval(port, DEVICE_ID_BYTE1_REG);
144         did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
145
146         vid = regval(port, VENDOR_ID_BYTE1_REG);
147         vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
148
149         if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
150                 if (verbose)
151                         printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
152                 exit_conf_mode_winbond_fintek_ite_8787(port);
153                 return;
154         }
155
156         printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
157                get_superio_name(reg_table, did), vid, did, port);
158
159         dump_superio("Fintek", reg_table, port, did);
160         dump_readable_fintek(port, did);
161
162         exit_conf_mode_winbond_fintek_ite_8787(port);
163 }
164