This adds register map based on NSC PC87392 datasheet. LDN#2 can be
[coreboot.git] / util / superiotool / fintek.c
1 /*
2  * This file is part of the superiotool project.
3  *
4  * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5  * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
20  */
21
22 #include "superiotool.h"
23
24 #define DEVICE_ID_BYTE1_REG     0x20
25 #define DEVICE_ID_BYTE2_REG     0x21
26
27 #define VENDOR_ID_BYTE1_REG     0x23
28 #define VENDOR_ID_BYTE2_REG     0x24
29
30 #define FINTEK_VENDOR_ID        0x3419
31
32 static const struct superio_registers reg_table[] = {
33         {0x0106, "F71862FG / F71863FG", {       /* Same ID? Datasheet typo? */
34                 {EOT}}},
35         {0x4103, "F71872F/FG / F71806F/FG", {   /* Same ID? Datasheet typo? */
36                 {EOT}}},
37         {0x4105, "F71882FG/F71883FG", {         /* Same ID? Datasheet typo? */
38                 /* We assume reserved bits are read as 0. */
39                 {NOLDN, NULL,
40                         {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
41                          0x2b,0x2c,0x2d,EOT},
42                         {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
43                          0x00,0x08,0x08,EOT}},
44                 {0x0, "Floppy",
45                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
46                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
47                 {0x1, "COM1",
48                         {0x30,0x60,0x61,0x70,0xf0,EOT},
49                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
50                 {0x2, "COM2",
51                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
52                         {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
53                 {0x3, "Parallel port",
54                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
55                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
56                 {0x4, "Hardware monitor",
57                         {0x30,0x60,0x61,0x70,EOT},
58                         {0x01,0x02,0x95,0x00,EOT}},
59                 {0x5, "Keyboard",
60                         {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
61                         {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
62                 {0x6, "GPIO",
63                         {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
64                          0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
65                          0xf3,EOT},
66                         {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
67                          0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
68                          0x00,EOT}},
69                 {0x7, "VID",
70                         {0x30,0x60,0x61,EOT},
71                         {0x00,0x00,0x00,EOT}},
72                 {0x7, "SPI",
73                         {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
74                          0xfb,0xfc,0xfd,0xfe,0xff,EOT},
75                         {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
76                          0x00,0x00,0x00,0x00,0x00,EOT}},
77                 {0xa, "PME, ACPI",
78                         {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
79                         {0x00,0x00,0x01,0x06,0x1c,EOT}},
80                 {EOT}}},
81         {0x0604, "F71805F/FG", {
82                 /* We assume reserved bits are read as 0. */
83                 {NOLDN, NULL,
84                         {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
85                         {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
86                 {0x0, "Floppy",
87                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
88                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
89                 {0x1, "COM1",
90                         {0x30,0x60,0x61,0x70,0xf0,EOT},
91                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
92                 {0x2, "COM2",
93                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
94                         {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
95                 {0x3, "Parallel port",
96                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
97                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
98                 {0x4, "Hardware monitor",
99                         {0x30,0x60,0x61,0x70,EOT},
100                         {0x00,0x02,0x95,0x00,EOT}},
101                 {0x6, "GPIO",
102                         {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
103                          0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
104                         {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
105                          0x00,0x00,NANA,0x00,NANA,EOT}},
106                 {0xa, "PME",
107                         {0x30,0xf0,0xf1,EOT},
108                         {0x00,0x00,0x00,EOT}},
109                 {EOT}}},
110         {0x0581, "F8000", {     /* Fintek/ASUS F8000 */
111                 {EOT}}},
112         {EOT}
113 };
114
115 void probe_idregs_fintek(uint16_t port)
116 {
117         uint16_t vid, did;
118
119         probing_for("Fintek", "", port);
120
121         enter_conf_mode_winbond_fintek_ite_8787(port);
122
123         did = regval(port, DEVICE_ID_BYTE1_REG);
124         did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
125
126         vid = regval(port, VENDOR_ID_BYTE1_REG);
127         vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
128
129         if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
130                 if (verbose)
131                         printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
132                 exit_conf_mode_winbond_fintek_ite_8787(port);
133                 return;
134         }
135
136         printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
137                get_superio_name(reg_table, did), vid, did, port);
138         chip_found = 1;
139
140         dump_superio("Fintek", reg_table, port, did, LDN_SEL);
141
142         exit_conf_mode_winbond_fintek_ite_8787(port);
143 }
144
145 void print_fintek_chips(void)
146 {
147         print_vendor_chips("Fintek", reg_table);
148 }