util/superiotool/fintek.c

   1 /*
   2  * This file is part of the superiotool project.
   3  *
   4  * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
   5  * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  20  */
  21
  22 #include "superiotool.h"
  23
  24 #define DEVICE_ID_BYTE1_REG     0x20
  25 #define DEVICE_ID_BYTE2_REG     0x21
  26
  27 #define VENDOR_ID_BYTE1_REG     0x23
  28 #define VENDOR_ID_BYTE2_REG     0x24
  29
  30 #define FINTEK_VENDOR_ID        0x3419
  31
  32 static const struct superio_registers reg_table[] = {
  33         {0x0106, "F71862FG / F71863FG", {       /* Same ID? Datasheet typo? */
  34                 /* We assume reserved bits are read as 0. */
  35                 {NOLDN, NULL,
  36                         {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
  37                          0x2b,0x2c,0x2d,EOT},
  38                         {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
  39                          0x00,0x00,0x08,EOT}},
  40                 {0x0, "FDC",
  41                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
  42                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
  43                 {0x1, "UART1",
  44                         {0x30,0x60,0x61,0x70,0xf0,EOT},
  45                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
  46                 {0x2, "UART2",
  47                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
  48                         {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
  49                 {0x3, "Parallel port",
  50                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
  51                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
  52                 {0x4, "Hardware monitor",
  53                         {0x30,0x60,0x61,0x70,EOT},
  54                         {0x01,0x02,0x95,0x00,EOT}},
  55                 {0x5, "Keyboard",
  56                         {0x30,0x60,0x61,0x70,0x72,EOT},
  57                         {0x01,0x00,0x60,0x00,0x00,EOT}},
  58                 {0x6, "GPIO",
  59                         {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
  60                          0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
  61                          EOT},
  62                         {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
  63                          NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
  64                          EOT}},
  65                 {0x7, "VID",
  66                         {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
  67                          0xf7,EOT},
  68                         {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
  69                          0x00,EOT}},
  70                 {0x8, "SPI",
  71                         {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
  72                          0xfb,0xfc,0xfd,0xfe,0xff,EOT},
  73                         {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
  74                          0x00,0x00,0x00,0x00,0x00,EOT}},
  75                 {0xa, "PME, ACPI",
  76                         {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
  77                         {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
  78                 {EOT}}},
  79         {0x4103, "F71872F/FG / F71806F/FG", {   /* Same ID? Datasheet typo? */
  80                 {EOT}}},
  81         {0x4105, "F71882FG/F71883FG", {         /* Same ID? Datasheet typo? */
  82                 /* We assume reserved bits are read as 0. */
  83                 {NOLDN, NULL,
  84                         {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
  85                          0x2b,0x2c,0x2d,EOT},
  86                         {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
  87                          0x00,0x08,0x08,EOT}},
  88                 {0x0, "Floppy",
  89                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
  90                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
  91                 {0x1, "COM1",
  92                         {0x30,0x60,0x61,0x70,0xf0,EOT},
  93                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
  94                 {0x2, "COM2",
  95                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
  96                         {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
  97                 {0x3, "Parallel port",
  98                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
  99                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
 100                 {0x4, "Hardware monitor",
 101                         {0x30,0x60,0x61,0x70,EOT},
 102                         {0x01,0x02,0x95,0x00,EOT}},
 103                 {0x5, "Keyboard",
 104                         {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
 105                         {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
 106                 {0x6, "GPIO",
 107                         {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
 108                          0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
 109                          0xf3,EOT},
 110                         {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
 111                          0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
 112                          0x00,EOT}},
 113                 {0x7, "VID",
 114                         {0x30,0x60,0x61,EOT},
 115                         {0x00,0x00,0x00,EOT}},
 116                 {0x7, "SPI",
 117                         {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
 118                          0xfb,0xfc,0xfd,0xfe,0xff,EOT},
 119                         {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
 120                          0x00,0x00,0x00,0x00,0x00,EOT}},
 121                 {0xa, "PME, ACPI",
 122                         {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
 123                         {0x00,0x00,0x01,0x06,0x1c,EOT}},
 124                 {EOT}}},
 125         {0x0604, "F71805F/FG", {
 126                 /* We assume reserved bits are read as 0. */
 127                 {NOLDN, NULL,
 128                         {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
 129                         {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
 130                 {0x0, "Floppy",
 131                         {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
 132                         {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
 133                 {0x1, "COM1",
 134                         {0x30,0x60,0x61,0x70,0xf0,EOT},
 135                         {0x01,0x03,0xf8,0x04,0x00,EOT}},
 136                 {0x2, "COM2",
 137                         {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
 138                         {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
 139                 {0x3, "Parallel port",
 140                         {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
 141                         {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
 142                 {0x4, "Hardware monitor",
 143                         {0x30,0x60,0x61,0x70,EOT},
 144                         {0x00,0x02,0x95,0x00,EOT}},
 145                 {0x6, "GPIO",
 146                         {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
 147                          0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
 148                         {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
 149                          0x00,0x00,NANA,0x00,NANA,EOT}},
 150                 {0xa, "PME",
 151                         {0x30,0xf0,0xf1,EOT},
 152                         {0x00,0x00,0x00,EOT}},
 153                 {EOT}}},
 154         {0x0581, "F8000", {     /* Fintek/ASUS F8000 */
 155                 {EOT}}},
 156         {EOT}
 157 };
 158
 159 void probe_idregs_fintek(uint16_t port)
 160 {
 161         uint16_t vid, did;
 162
 163         probing_for("Fintek", "", port);
 164
 165         enter_conf_mode_winbond_fintek_ite_8787(port);
 166
 167         did = regval(port, DEVICE_ID_BYTE1_REG);
 168         did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
 169
 170         vid = regval(port, VENDOR_ID_BYTE1_REG);
 171         vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
 172
 173         if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
 174                 if (verbose)
 175                         printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
 176                 exit_conf_mode_winbond_fintek_ite_8787(port);
 177                 return;
 178         }
 179
 180         printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
 181                get_superio_name(reg_table, did), vid, did, port);
 182         chip_found = 1;
 183
 184         dump_superio("Fintek", reg_table, port, did, LDN_SEL);
 185
 186         exit_conf_mode_winbond_fintek_ite_8787(port);
 187 }
 188
 189 void print_fintek_chips(void)
 190 {
 191         print_vendor_chips("Fintek", reg_table);
 192 }