2 * This file is part of the superiotool project.
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5 * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include "superiotool.h"
24 #define DEVICE_ID_BYTE1_REG 0x20
25 #define DEVICE_ID_BYTE2_REG 0x21
27 #define VENDOR_ID_BYTE1_REG 0x23
28 #define VENDOR_ID_BYTE2_REG 0x24
30 #define FINTEK_VENDOR_ID 0x3419
32 static const struct superio_registers reg_table[] = {
33 {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
34 /* We assume reserved bits are read as 0. */
36 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
38 {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
41 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
42 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
44 {0x30,0x60,0x61,0x70,0xf0,EOT},
45 {0x01,0x03,0xf8,0x04,0x00,EOT}},
47 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
48 {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
49 {0x3, "Parallel port",
50 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
51 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
52 {0x4, "Hardware monitor",
53 {0x30,0x60,0x61,0x70,EOT},
54 {0x01,0x02,0x95,0x00,EOT}},
56 {0x30,0x60,0x61,0x70,0x72,EOT},
57 {0x01,0x00,0x60,0x00,0x00,EOT}},
59 {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
60 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
62 {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
63 NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
66 {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
68 {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
71 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
72 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
73 {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
74 0x00,0x00,0x00,0x00,0x00,EOT}},
76 {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
77 {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
79 {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
81 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
82 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
83 {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
84 0x80,0x00,0x00,0x00,0x04,EOT}},
86 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
87 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
89 {0x30,0x60,0x61,0x70,0xf0,EOT},
90 {0x01,0x03,0xf8,0x04,0x00,EOT}},
92 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
93 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
94 {0x3, "Parallel port",
95 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
96 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
97 {0x4, "Hardware monitor",
98 {0x30,0x60,0x61,0x70,EOT},
99 {0x00,0x02,0x95,0x00,EOT}},
100 {0x5, "Keyboard", /* Only documented on F71872F/FG. */
101 {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
102 {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
104 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
105 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
107 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
108 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
111 {0x30,0x60,0x61,EOT},
112 {0x00,0x00,0x00,EOT}},
114 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
115 {0x00,0x00,0x61,0x06,0x3c,EOT}},
117 {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
118 /* We assume reserved bits are read as 0. */
120 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
122 {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
123 0x00,0x08,0x08,EOT}},
125 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
126 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
128 {0x30,0x60,0x61,0x70,0xf0,EOT},
129 {0x01,0x03,0xf8,0x04,0x00,EOT}},
131 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
132 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
133 {0x3, "Parallel port",
134 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
135 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
136 {0x4, "Hardware monitor",
137 {0x30,0x60,0x61,0x70,EOT},
138 {0x01,0x02,0x95,0x00,EOT}},
140 {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
141 {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
143 {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
144 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
146 {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
147 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
150 {0x30,0x60,0x61,EOT},
151 {0x00,0x00,0x00,EOT}},
153 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
154 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
155 {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
156 0x00,0x00,0x00,0x00,0x00,EOT}},
158 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
159 {0x00,0x00,0x01,0x06,0x1c,EOT}},
161 {0x0604, "F71805F/FG", {
162 /* We assume reserved bits are read as 0. */
164 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
165 {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
167 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
168 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
170 {0x30,0x60,0x61,0x70,0xf0,EOT},
171 {0x01,0x03,0xf8,0x04,0x00,EOT}},
173 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
174 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
175 {0x3, "Parallel port",
176 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
177 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
178 {0x4, "Hardware monitor",
179 {0x30,0x60,0x61,0x70,EOT},
180 {0x00,0x02,0x95,0x00,EOT}},
182 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
183 0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
184 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
185 0x00,0x00,NANA,0x00,NANA,EOT}},
187 {0x30,0xf0,0xf1,EOT},
188 {0x00,0x00,0x00,EOT}},
190 {0x0581, "F8000", { /* Fintek/ASUS F8000 */
192 {0x0802, "F81216D/DG", {
197 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
198 {NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
200 {0x30,0x60,0x61,0x70,0xf0,EOT},
201 {NANA,NANA,NANA,NANA,0x00,EOT}},
203 {0x30,0x60,0x61,0x70,0xf0,EOT},
204 {NANA,NANA,NANA,NANA,0x00,EOT}},
206 {0x30,0x60,0x61,0x70,0xf0,EOT},
207 {NANA,NANA,NANA,NANA,0x00,EOT}},
209 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
210 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
212 {0x1602, "F81216AD", {
217 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
218 {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
220 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
221 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
223 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
224 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
226 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
227 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
229 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
230 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
235 void probe_idregs_fintek(uint16_t port)
239 probing_for("Fintek", "", port);
241 enter_conf_mode_winbond_fintek_ite_8787(port);
243 did = regval(port, DEVICE_ID_BYTE1_REG);
244 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
246 vid = regval(port, VENDOR_ID_BYTE1_REG);
247 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
249 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
251 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
252 exit_conf_mode_winbond_fintek_ite_8787(port);
256 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
257 get_superio_name(reg_table, did), vid, did, port);
260 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
262 exit_conf_mode_winbond_fintek_ite_8787(port);
266 void probe_idregs_fintek_alternative(uint16_t port)
270 probing_for("Fintek", "", port);
272 enter_conf_mode_fintek_7777(port);
274 did = regval(port, DEVICE_ID_BYTE1_REG);
275 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
277 vid = regval(port, VENDOR_ID_BYTE1_REG);
278 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
280 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
282 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
283 exit_conf_mode_fintek_7777(port);
287 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
288 get_superio_name(reg_table, did), vid, did, port);
291 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
293 exit_conf_mode_fintek_7777(port);
296 void print_fintek_chips(void)
298 print_vendor_chips("Fintek", reg_table);