2 * inteltool - dump all registers on an Intel CPU + chipset based system.
4 * Copyright (C) 2008-2010 by coresystems GmbH
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include "inteltool.h"
26 * (G)MCH MMIO Config Space
28 int print_mchbar(struct pci_dev *nb)
30 int i, size = (16 * 1024);
31 volatile uint8_t *mchbar;
34 printf("\n============= MCHBAR ============\n\n");
36 switch (nb->device_id) {
37 case PCI_DEVICE_ID_INTEL_82915:
38 case PCI_DEVICE_ID_INTEL_82945GM:
39 case PCI_DEVICE_ID_INTEL_82945P:
40 case PCI_DEVICE_ID_INTEL_82975X:
41 mchbar_phys = pci_read_long(nb, 0x44) & 0xfffffffe;
43 case PCI_DEVICE_ID_INTEL_PM965:
44 case PCI_DEVICE_ID_INTEL_82Q35:
45 case PCI_DEVICE_ID_INTEL_82G33:
46 case PCI_DEVICE_ID_INTEL_82Q33:
47 mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
48 mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
50 case PCI_DEVICE_ID_INTEL_Q965:
51 case PCI_DEVICE_ID_INTEL_ATOM_DXXX:
52 case PCI_DEVICE_ID_INTEL_ATOM_NXXX:
53 mchbar_phys = pci_read_long(nb, 0x48);
55 /* Test if bit 0 of the MCHBAR reg is 1 to enable memory reads.
56 * If it isn't, try to set it. This may fail, because there is
57 * some bit that locks that bit, and isn't in the public
61 if(!(mchbar_phys & 1))
63 printf("Access to the MCHBAR is currently disabled, "\
64 "attempting to enable.\n");
66 pci_write_long(nb, 0x48, mchbar_phys);
67 if(pci_read_long(nb, 0x48) & 1)
68 printf("Enabled successfully.\n");
70 printf("Enable FAILED!\n");
72 mchbar_phys &= 0xfffffffe;
73 mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
75 case PCI_DEVICE_ID_INTEL_82443LX:
76 case PCI_DEVICE_ID_INTEL_82443BX:
77 case PCI_DEVICE_ID_INTEL_82810:
78 case PCI_DEVICE_ID_INTEL_82810E_MC:
79 case PCI_DEVICE_ID_INTEL_82810DC:
80 case PCI_DEVICE_ID_INTEL_82830M:
81 printf("This northbrigde does not have MCHBAR.\n");
83 case PCI_DEVICE_ID_INTEL_GS45:
84 mchbar_phys = pci_read_long(nb, 0x48) & 0xfffffffe;
85 mchbar_phys |= ((uint64_t)pci_read_long(nb, 0x4c)) << 32;
88 printf("Error: Dumping MCHBAR on this northbridge is not (yet) supported.\n");
92 mchbar = map_physical(mchbar_phys, size);
95 perror("Error mapping MCHBAR");
99 printf("MCHBAR = 0x%08llx (MEM)\n\n", mchbar_phys);
101 for (i = 0; i < size; i += 4) {
102 if (*(uint32_t *)(mchbar + i))
103 printf("0x%04x: 0x%08x\n", i, *(uint32_t *)(mchbar+i));
106 unmap_physical((void *)mchbar, size);