2 * inteltool - dump all registers on an Intel CPU + chipset based system.
4 * Copyright (C) 2008-2010 by coresystems GmbH
5 * Copyright (C) 2009 Carl-Daniel Hailfinger
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #if defined(__GLIBC__)
26 #if (defined(__MACH__) && defined(__APPLE__))
27 /* DirectIO is available here: http://www.coresystems.de/en/directio */
29 #include <DirectIO/darwinio.h>
33 /* This #include is needed for freebsd_{rd,wr}msr. */
34 #if defined(__FreeBSD__)
35 #include <machine/cpufunc.h>
38 #define INTELTOOL_VERSION "1.0"
40 /* Tested chipsets: */
41 #define PCI_VENDOR_ID_INTEL 0x8086
42 #define PCI_DEVICE_ID_INTEL_ICH 0x2410
43 #define PCI_DEVICE_ID_INTEL_ICH0 0x2420
44 #define PCI_DEVICE_ID_INTEL_ICH2 0x2440
45 #define PCI_DEVICE_ID_INTEL_ICH4 0x24c0
46 #define PCI_DEVICE_ID_INTEL_ICH4M 0x24cc
47 #define PCI_DEVICE_ID_INTEL_ICH6 0x2640
48 #define PCI_DEVICE_ID_INTEL_ICH7DH 0x27b0
49 #define PCI_DEVICE_ID_INTEL_ICH7 0x27b8
50 #define PCI_DEVICE_ID_INTEL_ICH7M 0x27b9
51 #define PCI_DEVICE_ID_INTEL_ICH7MDH 0x27bd
52 #define PCI_DEVICE_ID_INTEL_NM10 0x27bc
53 #define PCI_DEVICE_ID_INTEL_ICH8 0x2810
54 #define PCI_DEVICE_ID_INTEL_ICH8M 0x2815
55 #define PCI_DEVICE_ID_INTEL_ICH9DH 0x2912
56 #define PCI_DEVICE_ID_INTEL_ICH9DO 0x2914
57 #define PCI_DEVICE_ID_INTEL_ICH9R 0x2916
58 #define PCI_DEVICE_ID_INTEL_ICH9 0x2918
59 #define PCI_DEVICE_ID_INTEL_ICH9M 0x2919
60 #define PCI_DEVICE_ID_INTEL_ICH9ME 0x2917
61 #define PCI_DEVICE_ID_INTEL_ICH10R 0x3a16
62 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC 0x8119
64 #define PCI_DEVICE_ID_INTEL_82810 0x7120
65 #define PCI_DEVICE_ID_INTEL_82810DC 0x7122
66 #define PCI_DEVICE_ID_INTEL_82810E_MC 0x7124
67 #define PCI_DEVICE_ID_INTEL_82830M 0x3575
68 #define PCI_DEVICE_ID_INTEL_82845 0x1a30
69 #define PCI_DEVICE_ID_INTEL_82915 0x2580
70 #define PCI_DEVICE_ID_INTEL_82945P 0x2770
71 #define PCI_DEVICE_ID_INTEL_82945GM 0x27a0
72 #define PCI_DEVICE_ID_INTEL_82945GSE 0x27ac
73 #define PCI_DEVICE_ID_INTEL_PM965 0x2a00
74 #define PCI_DEVICE_ID_INTEL_Q965 0x2990
75 #define PCI_DEVICE_ID_INTEL_82975X 0x277c
76 #define PCI_DEVICE_ID_INTEL_82Q35 0x29b0
77 #define PCI_DEVICE_ID_INTEL_82G33 0x29c0
78 #define PCI_DEVICE_ID_INTEL_82Q33 0x29d0
79 #define PCI_DEVICE_ID_INTEL_GS45 0x2a40
80 #define PCI_DEVICE_ID_INTEL_X58 0x3405
81 #define PCI_DEVICE_ID_INTEL_SCH_POULSBO 0x8100
82 #define PCI_DEVICE_ID_INTEL_ATOM_DXXX 0xa000
84 /* untested, but almost identical to D-series */
85 #define PCI_DEVICE_ID_INTEL_ATOM_NXXX 0xa010
87 #define PCI_DEVICE_ID_INTEL_82443LX 0x7180
88 /* 82443BX has a different device ID if AGP is disabled (hardware-wise). */
89 #define PCI_DEVICE_ID_INTEL_82443BX 0x7190
90 #define PCI_DEVICE_ID_INTEL_82443BX_NO_AGP 0x7192
92 /* 82371AB/EB/MB use the same device ID value. */
93 #define PCI_DEVICE_ID_INTEL_82371XX 0x7110
95 #define ARRAY_SIZE(a) ((int)(sizeof(a) / sizeof((a)[0])))
97 #if !defined(__DARWIN__) && !defined(__FreeBSD__)
98 typedef struct { uint32_t hi, lo; } msr_t;
100 #if defined (__FreeBSD__)
101 /* FreeBSD already has conflicting definitions for wrmsr/rdmsr. */
104 #define rdmsr freebsd_rdmsr
105 #define wrmsr freebsd_wrmsr
106 typedef struct { uint32_t hi, lo; } msr_t;
107 msr_t freebsd_rdmsr(int addr);
108 int freebsd_wrmsr(int addr, msr_t msr);
110 typedef struct { uint16_t addr; int size; char *name; } io_register_t;
112 void *map_physical(unsigned long phys_addr, size_t len);
113 void unmap_physical(void *virt_addr, size_t len);
115 unsigned int cpuid(unsigned int op);
116 int print_intel_core_msrs(void);
117 int print_mchbar(struct pci_dev *nb);
118 int print_pmbase(struct pci_dev *sb);
119 int print_rcba(struct pci_dev *sb);
120 int print_gpios(struct pci_dev *sb);
121 int print_epbar(struct pci_dev *nb);
122 int print_dmibar(struct pci_dev *nb);
123 int print_pciexbar(struct pci_dev *nb);