inteltool 82945G/GZ/P/PL Support (trivial)
[coreboot.git] / util / inteltool / inteltool.c
1 /*
2  * inteltool - dump all registers on an Intel CPU + chipset based system.
3  *
4  * Copyright (C) 2008 by coresystems GmbH 
5  *  written by Stefan Reinauer <stepan@coresystems.de> 
6  * 
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; version 2 of the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19  */
20
21 #include <stdio.h>
22 #include <stdlib.h>
23 #include <getopt.h>
24 #include <sys/io.h>
25 #include <fcntl.h>
26
27 #include "inteltool.h"
28
29 static const struct {
30         uint16_t vendor_id, device_id;
31         char *name;
32 } supported_chips_list[] = {
33         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },
34         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" },
35         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
36         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
37         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
38         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
39         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7DH, "ICH7DH" },
40         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4M, "ICH4-M" },
41         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4, "ICH4" },
42         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2, "ICH2" },
43         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" },
44         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" }
45 };
46
47 int fd_mem;
48
49 void print_version(void)
50 {
51         printf("inteltool v%s -- ", INTELTOOL_VERSION);
52         printf("Copyright (C) 2008 coresystems GmbH\n\n");
53         printf(
54     "This program is free software: you can redistribute it and/or modify\n"
55     "it under the terms of the GNU General Public License as published by\n"
56     "the Free Software Foundation, version 2 of the License.\n\n"
57     "This program is distributed in the hope that it will be useful,\n"
58     "but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
59     "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
60     "GNU General Public License for more details.\n\n"
61     "You should have received a copy of the GNU General Public License\n"
62     "along with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n");
63 }
64
65 void print_usage(const char *name)
66 {
67         printf("usage: %s [-vh?grpmedPMa]\n", name);
68         printf("\n"
69              "   -v | --version:                   print the version\n"
70              "   -h | --help:                      print this help\n\n"
71              "   -g | --gpio:                      dump soutbridge GPIO registers\n"
72              "   -r | --rcba:                      dump soutbridge RCBA registers\n"
73              "   -p | --pmbase:                    dump soutbridge Power Management registers\n\n"
74              "   -m | --mchbar:                    dump northbridge Memory Controller registers\n"
75              "   -e | --epbar:                     dump northbridge EPBAR registers\n"
76              "   -d | --dmibar:                    dump northbridge DMIBAR registers\n"
77              "   -P | --pciexpress:                dump northbridge PCIEXBAR registers\n\n"
78              "   -M | --msrs:                      dump CPU MSRs\n"
79              "   -a | --all:                       dump all known registers\n"
80              "\n");
81         exit(1);
82 }
83
84 int main(int argc, char *argv[])
85 {
86         struct pci_access *pacc;
87         struct pci_dev *sb, *nb;
88         int i, opt, option_index = 0;
89         unsigned int id;
90
91         char *sbname = "unknown", *nbname = "unknown";
92
93         int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
94         int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
95         int dump_pciexbar = 0, dump_coremsrs = 0;
96
97         static struct option long_options[] = {
98                 {"version", 0, 0, 'v'},
99                 {"help", 0, 0, 'h'},
100                 {"gpios", 0, 0, 'g'},
101                 {"mchbar", 0, 0, 'm'},
102                 {"rcba", 0, 0, 'r'},
103                 {"pmbase", 0, 0, 'p'},
104                 {"epbar", 0, 0, 'e'},
105                 {"dmibar", 0, 0, 'd'},
106                 {"pciexpress", 0, 0, 'P'},
107                 {"msrs", 0, 0, 'M'},
108                 {"all", 0, 0, 'a'},
109                 {0, 0, 0, 0}
110         };
111
112         while ((opt = getopt_long(argc, argv, "vh?grpmedPMa",
113                                   long_options, &option_index)) != EOF) {
114                 switch (opt) {
115                 case 'v':
116                         print_version();
117                         exit(0);
118                         break;
119                 case 'g':
120                         dump_gpios = 1;
121                         break;
122                 case 'm':
123                         dump_mchbar = 1;
124                         break;
125                 case 'r':
126                         dump_rcba = 1;
127                         break;
128                 case 'p':
129                         dump_pmbase = 1;
130                         break;
131                 case 'e':
132                         dump_epbar = 1;
133                         break;
134                 case 'd':
135                         dump_dmibar = 1;
136                         break;
137                 case 'P':
138                         dump_pciexbar = 1;
139                         break;
140                 case 'M':
141                         dump_coremsrs = 1;
142                         break;
143                 case 'a':
144                         dump_gpios = 1;
145                         dump_mchbar = 1;
146                         dump_rcba = 1;
147                         dump_pmbase = 1;
148                         dump_epbar = 1;
149                         dump_dmibar = 1;
150                         dump_pciexbar = 1;
151                         dump_coremsrs = 1;
152                         break;
153                 case 'h':
154                 case '?':
155                 default:
156                         print_usage(argv[0]);
157                         exit(0);
158                         break;
159                 }
160         }
161
162         if (iopl(3)) {
163                 printf("You need to be root.\n");
164                 exit(1);
165         }
166
167         if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
168                 perror("Can not open /dev/mem");
169                 exit(1);
170         }
171
172         pacc = pci_alloc();
173         pci_init(pacc);
174         pci_scan_bus(pacc);
175
176         /* Find the required devices */
177
178         sb = pci_get_dev(pacc, 0, 0, 0x1f, 0);
179         if (!sb) {
180                 printf("No southbridge found.\n");
181                 exit(1);
182         }
183
184         pci_fill_info(sb, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
185
186         if (sb->vendor_id != PCI_VENDOR_ID_INTEL) {
187                 printf("Not an Intel(R) southbridge.\n");
188                 exit(1);
189         }
190
191         nb = pci_get_dev(pacc, 0, 0, 0x00, 0);
192         if (!nb) {
193                 printf("No northbridge found.\n");
194                 exit(1);
195         }
196
197         pci_fill_info(nb, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
198
199         if (nb->vendor_id != PCI_VENDOR_ID_INTEL) {
200                 printf("Not an Intel(R) northbridge.\n");
201                 exit(1);
202         }
203
204         id = cpuid(1);
205         printf("Intel CPU: Family %x, Model %x\n", 
206                         (id >> 8) & 0xf, (id >> 4) & 0xf);
207
208         /* Determine names */
209         for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
210                 if (nb->device_id == supported_chips_list[i].device_id)
211                         nbname = supported_chips_list[i].name;
212         for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
213                 if (sb->device_id == supported_chips_list[i].device_id)
214                         sbname = supported_chips_list[i].name;
215
216         printf("Intel Northbridge: %04x:%04x (%s)\n", 
217                 nb->vendor_id, nb->device_id, nbname);
218
219         printf("Intel Southbridge: %04x:%04x (%s)\n", 
220                 sb->vendor_id, sb->device_id, sbname);
221
222         /* Now do the deed */
223
224         if (dump_gpios) {
225                 print_gpios(sb);
226                 printf("\n\n");
227         }
228
229         if (dump_rcba) {
230                 print_rcba(sb);
231                 printf("\n\n");
232         }
233
234         if (dump_pmbase) {
235                 print_pmbase(sb);
236                 printf("\n\n");
237         }
238
239         if (dump_mchbar) {
240                 print_mchbar(nb);
241                 printf("\n\n");
242         }
243
244         if (dump_epbar) {
245                 print_epbar(nb);
246                 printf("\n\n");
247         }
248
249         if (dump_dmibar) {
250                 print_dmibar(nb);
251                 printf("\n\n");
252         }
253
254         if (dump_pciexbar) {
255                 print_pciexbar(nb);
256                 printf("\n\n");
257         }
258
259         if (dump_coremsrs) {
260                 print_intel_core_msrs();
261                 printf("\n\n");
262         }
263
264         /* Clean up */
265         pci_free_dev(nb);
266         pci_free_dev(sb);
267         pci_cleanup(pacc);
268
269         return 0;
270 }