util/inteltool/inteltool.c

   1 /*
   2  * inteltool - dump all registers on an Intel CPU + chipset based system.
   3  *
   4  * Copyright (C) 2008-2010 by coresystems GmbH
   5  *  written by Stefan Reinauer <stepan@coresystems.de>
   6  * Copyright (C) 2009 Carl-Daniel Hailfinger
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; version 2 of the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <stdio.h>
  23 #include <stdlib.h>
  24 #include <getopt.h>
  25 #include <fcntl.h>
  26 #include <sys/mman.h>
  27 #include "inteltool.h"
  28 #if defined(__FreeBSD__)
  29 #include <unistd.h>
  30 #endif
  31
  32 static const struct {
  33         uint16_t vendor_id, device_id;
  34         char *name;
  35 } supported_chips_list[] = {
  36         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX, "82443LX" },
  37         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX, "82443BX" },
  38         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_NO_AGP, "82443BX without AGP" },
  39         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810, "i810" },
  40         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810DC, "i810-DC100" },
  41         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_MC, "i810E DC-133" },
  42         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82830M, "i830M" },
  43         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },
  44         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915, "82915G/P/GV/GL/PL/910GL" },
  45         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" },
  46         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
  47         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GSE, "i945GSE" },
  48         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PM965, "PM965" },
  49         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q965, "Q963/965" },
  50         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "i975X" },
  51         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q35, "Q35" },
  52         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" },
  53         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" },
  54         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" },
  55         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GS45, "GS45ME" },
  56         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ATOM_DXXX, "Atom D400/500 Series" },
  57         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ATOM_NXXX, "Atom N400 Series" },
  58         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO, "SCH Poulsbo" },
  59         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SCH_POULSBO_LPC, "SCH Poulsbo" },
  60         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
  61         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DH, "ICH9DH" },
  62         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9DO, "ICH9DO" },
  63         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9R, "ICH9R" },
  64         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9, "ICH9" },
  65         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9M, "ICH9M" },
  66         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9ME, "ICH9M-E" },
  67         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
  68         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8, "ICH8" },
  69         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10, "NM10" },
  70         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
  71         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
  72         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
  73         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7DH, "ICH7DH" },
  74         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6, "ICH6" },
  75         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4M, "ICH4-M" },
  76         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4, "ICH4" },
  77         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2, "ICH2" },
  78         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" },
  79         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" },
  80         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "82371AB/EB/MB" },
  81 };
  82
  83 #ifndef __DARWIN__
  84 static int fd_mem;
  85
  86 void *map_physical(unsigned long phys_addr, size_t len)
  87 {
  88         void *virt_addr;
  89
  90         virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
  91                     fd_mem, (off_t) phys_addr);
  92
  93         if (virt_addr == MAP_FAILED) {
  94                 printf("Error mapping physical memory 0x%08lx[0x%x]\n", phys_addr, len);
  95                 return NULL;
  96         }
  97
  98         return virt_addr;
  99 }
 100
 101 void unmap_physical(void *virt_addr, size_t len)
 102 {
 103         munmap(virt_addr, len);
 104 }
 105 #endif
 106
 107 void print_version(void)
 108 {
 109         printf("inteltool v%s -- ", INTELTOOL_VERSION);
 110         printf("Copyright (C) 2008 coresystems GmbH\n\n");
 111         printf(
 112     "This program is free software: you can redistribute it and/or modify\n"
 113     "it under the terms of the GNU General Public License as published by\n"
 114     "the Free Software Foundation, version 2 of the License.\n\n"
 115     "This program is distributed in the hope that it will be useful,\n"
 116     "but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
 117     "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
 118     "GNU General Public License for more details.\n\n"
 119     "You should have received a copy of the GNU General Public License\n"
 120     "along with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n");
 121 }
 122
 123 void print_usage(const char *name)
 124 {
 125         printf("usage: %s [-vh?grpmedPMa]\n", name);
 126         printf("\n"
 127              "   -v | --version:                   print the version\n"
 128              "   -h | --help:                      print this help\n\n"
 129              "   -g | --gpio:                      dump soutbridge GPIO registers\n"
 130              "   -r | --rcba:                      dump soutbridge RCBA registers\n"
 131              "   -p | --pmbase:                    dump soutbridge Power Management registers\n\n"
 132              "   -m | --mchbar:                    dump northbridge Memory Controller registers\n"
 133              "   -e | --epbar:                     dump northbridge EPBAR registers\n"
 134              "   -d | --dmibar:                    dump northbridge DMIBAR registers\n"
 135              "   -P | --pciexpress:                dump northbridge PCIEXBAR registers\n\n"
 136              "   -M | --msrs:                      dump CPU MSRs\n"
 137              "   -a | --all:                       dump all known registers\n"
 138              "\n");
 139         exit(1);
 140 }
 141
 142 int main(int argc, char *argv[])
 143 {
 144         struct pci_access *pacc;
 145         struct pci_dev *sb = NULL, *nb, *dev;
 146         int i, opt, option_index = 0;
 147         unsigned int id;
 148
 149         char *sbname = "unknown", *nbname = "unknown";
 150
 151         int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
 152         int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
 153         int dump_pciexbar = 0, dump_coremsrs = 0;
 154
 155         static struct option long_options[] = {
 156                 {"version", 0, 0, 'v'},
 157                 {"help", 0, 0, 'h'},
 158                 {"gpios", 0, 0, 'g'},
 159                 {"mchbar", 0, 0, 'm'},
 160                 {"rcba", 0, 0, 'r'},
 161                 {"pmbase", 0, 0, 'p'},
 162                 {"epbar", 0, 0, 'e'},
 163                 {"dmibar", 0, 0, 'd'},
 164                 {"pciexpress", 0, 0, 'P'},
 165                 {"msrs", 0, 0, 'M'},
 166                 {"all", 0, 0, 'a'},
 167                 {0, 0, 0, 0}
 168         };
 169
 170         while ((opt = getopt_long(argc, argv, "vh?grpmedPMa",
 171                                   long_options, &option_index)) != EOF) {
 172                 switch (opt) {
 173                 case 'v':
 174                         print_version();
 175                         exit(0);
 176                         break;
 177                 case 'g':
 178                         dump_gpios = 1;
 179                         break;
 180                 case 'm':
 181                         dump_mchbar = 1;
 182                         break;
 183                 case 'r':
 184                         dump_rcba = 1;
 185                         break;
 186                 case 'p':
 187                         dump_pmbase = 1;
 188                         break;
 189                 case 'e':
 190                         dump_epbar = 1;
 191                         break;
 192                 case 'd':
 193                         dump_dmibar = 1;
 194                         break;
 195                 case 'P':
 196                         dump_pciexbar = 1;
 197                         break;
 198                 case 'M':
 199                         dump_coremsrs = 1;
 200                         break;
 201                 case 'a':
 202                         dump_gpios = 1;
 203                         dump_mchbar = 1;
 204                         dump_rcba = 1;
 205                         dump_pmbase = 1;
 206                         dump_epbar = 1;
 207                         dump_dmibar = 1;
 208                         dump_pciexbar = 1;
 209                         dump_coremsrs = 1;
 210                         break;
 211                 case 'h':
 212                 case '?':
 213                 default:
 214                         print_usage(argv[0]);
 215                         exit(0);
 216                         break;
 217                 }
 218         }
 219
 220 #if defined(__FreeBSD__)
 221         int io_fd;
 222 #endif
 223
 224 #if defined(__FreeBSD__)
 225         if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
 226                 perror("/dev/io");
 227 #else
 228         if (iopl(3)) {
 229                 perror("iopl");
 230 #endif
 231                 printf("You need to be root.\n");
 232                 exit(1);
 233         }
 234
 235 #ifndef __DARWIN__
 236         if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
 237                 perror("Can not open /dev/mem");
 238                 exit(1);
 239         }
 240 #endif
 241
 242         pacc = pci_alloc();
 243         pci_init(pacc);
 244         pci_scan_bus(pacc);
 245
 246         /* Find the required devices */
 247         for (dev = pacc->devices; dev; dev = dev->next) {
 248                 pci_fill_info(dev, PCI_FILL_CLASS);
 249                 /* The ISA/LPC bridge can be 0x1f, 0x07, or 0x04 so we probe. */
 250                 if (dev->device_class == 0x0601) { /* ISA/LPC bridge */
 251                         if (sb == NULL)
 252                                 sb = dev;
 253                         else
 254                                 fprintf(stderr, "Multiple devices with class ID"
 255                                         " 0x0601, using %02x%02x:%02x.%02x\n",
 256                                         dev->domain, dev->bus, dev->dev,
 257                                         dev->func);
 258                 }
 259         }
 260
 261         if (!sb) {
 262                 printf("No southbridge found.\n");
 263                 exit(1);
 264         }
 265
 266         pci_fill_info(sb, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
 267
 268         if (sb->vendor_id != PCI_VENDOR_ID_INTEL) {
 269                 printf("Not an Intel(R) southbridge.\n");
 270                 exit(1);
 271         }
 272
 273         nb = pci_get_dev(pacc, 0, 0, 0x00, 0);
 274         if (!nb) {
 275                 printf("No northbridge found.\n");
 276                 exit(1);
 277         }
 278
 279         pci_fill_info(nb, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
 280
 281         if (nb->vendor_id != PCI_VENDOR_ID_INTEL) {
 282                 printf("Not an Intel(R) northbridge.\n");
 283                 exit(1);
 284         }
 285
 286         id = cpuid(1);
 287
 288         /* Intel has suggested applications to display the family of a CPU as
 289          * the sum of the "Family" and the "Extended Family" fields shown
 290          * above, and the model as the sum of the "Model" and the 4-bit
 291          * left-shifted "Extended Model" fields.
 292          * http://download.intel.com/design/processor/applnots/24161832.pdf
 293          */
 294         printf("Intel CPU: Processor Type: %x, Family %x, Model %x, Stepping %x\n",
 295                         (id >> 12) & 0x3, ((id >> 8) & 0xf) + ((id >> 20) & 0xff),
 296                         ((id >> 12) & 0xf0) + ((id >> 4) & 0xf), (id & 0xf));
 297
 298         /* Determine names */
 299         for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
 300                 if (nb->device_id == supported_chips_list[i].device_id)
 301                         nbname = supported_chips_list[i].name;
 302         for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
 303                 if (sb->device_id == supported_chips_list[i].device_id)
 304                         sbname = supported_chips_list[i].name;
 305
 306         printf("Intel Northbridge: %04x:%04x (%s)\n",
 307                 nb->vendor_id, nb->device_id, nbname);
 308
 309         printf("Intel Southbridge: %04x:%04x (%s)\n",
 310                 sb->vendor_id, sb->device_id, sbname);
 311
 312         /* Now do the deed */
 313
 314         if (dump_gpios) {
 315                 print_gpios(sb);
 316                 printf("\n\n");
 317         }
 318
 319         if (dump_rcba) {
 320                 print_rcba(sb);
 321                 printf("\n\n");
 322         }
 323
 324         if (dump_pmbase) {
 325                 print_pmbase(sb, pacc);
 326                 printf("\n\n");
 327         }
 328
 329         if (dump_mchbar) {
 330                 print_mchbar(nb);
 331                 printf("\n\n");
 332         }
 333
 334         if (dump_epbar) {
 335                 print_epbar(nb);
 336                 printf("\n\n");
 337         }
 338
 339         if (dump_dmibar) {
 340                 print_dmibar(nb);
 341                 printf("\n\n");
 342         }
 343
 344         if (dump_pciexbar) {
 345                 print_pciexbar(nb);
 346                 printf("\n\n");
 347         }
 348
 349         if (dump_coremsrs) {
 350                 print_intel_core_msrs();
 351                 printf("\n\n");
 352         }
 353
 354         /* Clean up */
 355         pci_free_dev(nb);
 356         // pci_free_dev(sb); // TODO: glibc detected "double free or corruption"
 357         pci_cleanup(pacc);
 358
 359         return 0;
 360 }