util/inteltool/inteltool.c

   1 /*
   2  * inteltool - dump all registers on an Intel CPU + chipset based system.
   3  *
   4  * Copyright (C) 2008-2010 by coresystems GmbH
   5  *  written by Stefan Reinauer <stepan@coresystems.de>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; version 2 of the License.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19  */
  20
  21 #include <stdio.h>
  22 #include <stdlib.h>
  23 #include <getopt.h>
  24 #include <fcntl.h>
  25 #include <sys/mman.h>
  26 #include "inteltool.h"
  27
  28 static const struct {
  29         uint16_t vendor_id, device_id;
  30         char *name;
  31 } supported_chips_list[] = {
  32         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443LX, "82443LX" },
  33         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX, "82443BX" },
  34         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_NO_AGP, "82443BX without AGP" },
  35         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810, "i810" },
  36         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810DC, "i810-DC100" },
  37         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82830M, "i830M" },
  38         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845, "i845" },
  39         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82915, "82915G/P/GV/GL/PL/910GL" },
  40         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945P, "i945P" },
  41         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82945GM, "i945GM" },
  42         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PM965, "PM965" },
  43         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82975X, "i975X" },
  44         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q35, "Q35" },
  45         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82G33, "P35/G33/G31/P31" },
  46         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82Q33, "Q33" },
  47         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_X58, "X58" },
  48         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10R, "ICH10R" },
  49         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8M, "ICH8-M" },
  50         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7MDH, "ICH7-M DH" },
  51         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7M, "ICH7-M" },
  52         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7, "ICH7" },
  53         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7DH, "ICH7DH" },
  54         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6, "ICH6" },
  55         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4M, "ICH4-M" },
  56         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4, "ICH4" },
  57         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2, "ICH2" },
  58         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH0, "ICH0" },
  59         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH, "ICH" },
  60         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371XX, "82371AB/EB/MB" },
  61 };
  62
  63 #ifndef __DARWIN__
  64 static int fd_mem;
  65
  66 void *map_physical(unsigned long phys_addr, size_t len)
  67 {
  68         void *virt_addr;
  69
  70         virt_addr = mmap(0, len, PROT_WRITE | PROT_READ, MAP_SHARED,
  71                     fd_mem, (off_t) phys_addr);
  72
  73         if (virt_addr == MAP_FAILED) {
  74                 printf("Error mapping physical memory 0x%08lx[0x%x]\n", phys_addr, len);
  75                 return NULL;
  76         }
  77
  78         return virt_addr;
  79 }
  80
  81 void unmap_physical(void *virt_addr, size_t len)
  82 {
  83         munmap(virt_addr, len);
  84 }
  85 #endif
  86
  87 void print_version(void)
  88 {
  89         printf("inteltool v%s -- ", INTELTOOL_VERSION);
  90         printf("Copyright (C) 2008 coresystems GmbH\n\n");
  91         printf(
  92     "This program is free software: you can redistribute it and/or modify\n"
  93     "it under the terms of the GNU General Public License as published by\n"
  94     "the Free Software Foundation, version 2 of the License.\n\n"
  95     "This program is distributed in the hope that it will be useful,\n"
  96     "but WITHOUT ANY WARRANTY; without even the implied warranty of\n"
  97     "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
  98     "GNU General Public License for more details.\n\n"
  99     "You should have received a copy of the GNU General Public License\n"
 100     "along with this program.  If not, see <http://www.gnu.org/licenses/>.\n\n");
 101 }
 102
 103 void print_usage(const char *name)
 104 {
 105         printf("usage: %s [-vh?grpmedPMa]\n", name);
 106         printf("\n"
 107              "   -v | --version:                   print the version\n"
 108              "   -h | --help:                      print this help\n\n"
 109              "   -g | --gpio:                      dump soutbridge GPIO registers\n"
 110              "   -r | --rcba:                      dump soutbridge RCBA registers\n"
 111              "   -p | --pmbase:                    dump soutbridge Power Management registers\n\n"
 112              "   -m | --mchbar:                    dump northbridge Memory Controller registers\n"
 113              "   -e | --epbar:                     dump northbridge EPBAR registers\n"
 114              "   -d | --dmibar:                    dump northbridge DMIBAR registers\n"
 115              "   -P | --pciexpress:                dump northbridge PCIEXBAR registers\n\n"
 116              "   -M | --msrs:                      dump CPU MSRs\n"
 117              "   -a | --all:                       dump all known registers\n"
 118              "\n");
 119         exit(1);
 120 }
 121
 122 int main(int argc, char *argv[])
 123 {
 124         struct pci_access *pacc;
 125         struct pci_dev *sb = NULL, *nb, *dev;
 126         int i, opt, option_index = 0;
 127         unsigned int id;
 128
 129         char *sbname = "unknown", *nbname = "unknown";
 130
 131         int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
 132         int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
 133         int dump_pciexbar = 0, dump_coremsrs = 0;
 134
 135         static struct option long_options[] = {
 136                 {"version", 0, 0, 'v'},
 137                 {"help", 0, 0, 'h'},
 138                 {"gpios", 0, 0, 'g'},
 139                 {"mchbar", 0, 0, 'm'},
 140                 {"rcba", 0, 0, 'r'},
 141                 {"pmbase", 0, 0, 'p'},
 142                 {"epbar", 0, 0, 'e'},
 143                 {"dmibar", 0, 0, 'd'},
 144                 {"pciexpress", 0, 0, 'P'},
 145                 {"msrs", 0, 0, 'M'},
 146                 {"all", 0, 0, 'a'},
 147                 {0, 0, 0, 0}
 148         };
 149
 150         while ((opt = getopt_long(argc, argv, "vh?grpmedPMa",
 151                                   long_options, &option_index)) != EOF) {
 152                 switch (opt) {
 153                 case 'v':
 154                         print_version();
 155                         exit(0);
 156                         break;
 157                 case 'g':
 158                         dump_gpios = 1;
 159                         break;
 160                 case 'm':
 161                         dump_mchbar = 1;
 162                         break;
 163                 case 'r':
 164                         dump_rcba = 1;
 165                         break;
 166                 case 'p':
 167                         dump_pmbase = 1;
 168                         break;
 169                 case 'e':
 170                         dump_epbar = 1;
 171                         break;
 172                 case 'd':
 173                         dump_dmibar = 1;
 174                         break;
 175                 case 'P':
 176                         dump_pciexbar = 1;
 177                         break;
 178                 case 'M':
 179                         dump_coremsrs = 1;
 180                         break;
 181                 case 'a':
 182                         dump_gpios = 1;
 183                         dump_mchbar = 1;
 184                         dump_rcba = 1;
 185                         dump_pmbase = 1;
 186                         dump_epbar = 1;
 187                         dump_dmibar = 1;
 188                         dump_pciexbar = 1;
 189                         dump_coremsrs = 1;
 190                         break;
 191                 case 'h':
 192                 case '?':
 193                 default:
 194                         print_usage(argv[0]);
 195                         exit(0);
 196                         break;
 197                 }
 198         }
 199
 200         if (iopl(3)) {
 201                 printf("You need to be root.\n");
 202                 exit(1);
 203         }
 204
 205 #ifndef __DARWIN__
 206         if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
 207                 perror("Can not open /dev/mem");
 208                 exit(1);
 209         }
 210 #endif
 211
 212         pacc = pci_alloc();
 213         pci_init(pacc);
 214         pci_scan_bus(pacc);
 215
 216         /* Find the required devices */
 217         for (dev = pacc->devices; dev; dev = dev->next) {
 218                 pci_fill_info(dev, PCI_FILL_CLASS);
 219                 /* The ISA/LPC bridge can be 0x1f, 0x07, or 0x04 so we probe. */
 220                 if (dev->device_class == 0x0601) { /* ISA/LPC bridge */
 221                         if (sb == NULL)
 222                                 sb = dev;
 223                         else
 224                                 fprintf(stderr, "Multiple devices with class ID"
 225                                         " 0x0601, using %02x%02x:%02x.%02x\n",
 226                                         dev->domain, dev->bus, dev->dev,
 227                                         dev->func);
 228                 }
 229         }
 230
 231         if (!sb) {
 232                 printf("No southbridge found.\n");
 233                 exit(1);
 234         }
 235
 236         pci_fill_info(sb, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
 237
 238         if (sb->vendor_id != PCI_VENDOR_ID_INTEL) {
 239                 printf("Not an Intel(R) southbridge.\n");
 240                 exit(1);
 241         }
 242
 243         nb = pci_get_dev(pacc, 0, 0, 0x00, 0);
 244         if (!nb) {
 245                 printf("No northbridge found.\n");
 246                 exit(1);
 247         }
 248
 249         pci_fill_info(nb, PCI_FILL_IDENT|PCI_FILL_BASES|PCI_FILL_SIZES|PCI_FILL_CLASS);
 250
 251         if (nb->vendor_id != PCI_VENDOR_ID_INTEL) {
 252                 printf("Not an Intel(R) northbridge.\n");
 253                 exit(1);
 254         }
 255
 256         id = cpuid(1);
 257         printf("Intel CPU: Family %x, Model %x\n",
 258                         (id >> 8) & 0xf, (id >> 4) & 0xf);
 259
 260         /* Determine names */
 261         for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
 262                 if (nb->device_id == supported_chips_list[i].device_id)
 263                         nbname = supported_chips_list[i].name;
 264         for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++)
 265                 if (sb->device_id == supported_chips_list[i].device_id)
 266                         sbname = supported_chips_list[i].name;
 267
 268         printf("Intel Northbridge: %04x:%04x (%s)\n",
 269                 nb->vendor_id, nb->device_id, nbname);
 270
 271         printf("Intel Southbridge: %04x:%04x (%s)\n",
 272                 sb->vendor_id, sb->device_id, sbname);
 273
 274         /* Now do the deed */
 275
 276         if (dump_gpios) {
 277                 print_gpios(sb);
 278                 printf("\n\n");
 279         }
 280
 281         if (dump_rcba) {
 282                 print_rcba(sb);
 283                 printf("\n\n");
 284         }
 285
 286         if (dump_pmbase) {
 287                 print_pmbase(sb);
 288                 printf("\n\n");
 289         }
 290
 291         if (dump_mchbar) {
 292                 print_mchbar(nb);
 293                 printf("\n\n");
 294         }
 295
 296         if (dump_epbar) {
 297                 print_epbar(nb);
 298                 printf("\n\n");
 299         }
 300
 301         if (dump_dmibar) {
 302                 print_dmibar(nb);
 303                 printf("\n\n");
 304         }
 305
 306         if (dump_pciexbar) {
 307                 print_pciexbar(nb);
 308                 printf("\n\n");
 309         }
 310
 311         if (dump_coremsrs) {
 312                 print_intel_core_msrs();
 313                 printf("\n\n");
 314         }
 315
 316         /* Clean up */
 317         pci_free_dev(nb);
 318         // pci_free_dev(sb); // TODO: glibc detected "double free or corruption"
 319         pci_cleanup(pacc);
 320
 321         return 0;
 322 }