7 * Common Technology functions for DDR3 Recovery
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Proc/Recovery/Mem)
12 * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
66 #define FILECODE PROC_RECOVERY_MEM_TECH_DDR3_MRT3_FILECODE
67 /*----------------------------------------------------------------------------
68 * DEFINITIONS AND MACROS
70 *----------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------
74 * TYPEDEFS AND STRUCTURES
76 *----------------------------------------------------------------------------
79 /*----------------------------------------------------------------------------
80 * PROTOTYPES OF LOCAL FUNCTIONS
82 *----------------------------------------------------------------------------
85 /*----------------------------------------------------------------------------
88 *----------------------------------------------------------------------------
90 /* -----------------------------------------------------------------------------*/
93 * This function Constructs the technology block
95 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
96 * @param[in,out] *TechPtr - Pointer to the MEM_TECH_BLOCK
101 MemRecConstructTechBlock3 (
102 IN OUT MEM_TECH_BLOCK *TechPtr,
103 IN OUT MEM_NB_BLOCK *NBPtr
108 for (Dct = 0; Dct < NBPtr->MCTPtr->DctCount; Dct++) {
109 NBPtr->SwitchDCT (NBPtr, Dct);
110 for (Channel = 0; Channel < NBPtr->DCTPtr->ChannelCount; Channel++) {
111 NBPtr->SwitchChannel (NBPtr, Channel);
112 NBPtr->ChannelPtr->TechType = DDR3_TECHNOLOGY;
116 TechPtr->NBPtr = NBPtr;
117 TechPtr->RefPtr = NBPtr->RefPtr;
119 TechPtr->DramInit = MemRecTDramInitSw3;
120 TechPtr->SetDramMode = MemRecTSetDramMode3;
121 TechPtr->DimmPresence = MemRecTDIMMPresence3;
124 /* -----------------------------------------------------------------------------*/
127 * This function sets the initial controller environment before training.
129 * @param[in,out] *TechPtr - Pointer to the MEM_TECH_BLOCK
134 MemRecTBeginTraining (
135 IN OUT MEM_TECH_BLOCK *TechPtr
139 MEM_DATA_STRUCT *MemPtr;
142 NBPtr = TechPtr->NBPtr;
143 MemPtr = NBPtr->MemPtr;
145 LibAmdReadCpuReg (CR4_REG, &TechPtr->CR4reg);
146 LibAmdWriteCpuReg (CR4_REG, TechPtr->CR4reg | ((UINT32) 1 << 9)); // enable SSE2
148 LibAmdMsrRead (HWCR, (UINT64 *) (&SMsr), &MemPtr->StdHeader); // HWCR
149 TechPtr->HwcrLo = SMsr.lo;
150 SMsr.lo |= 0x00020000; // turn on HWCR.wrap32dis
151 SMsr.lo &= 0xFFFF7FFF; // turn off HWCR.SSEDIS
152 LibAmdMsrWrite (HWCR, (UINT64 *) (&SMsr), &MemPtr->StdHeader);
155 /* -----------------------------------------------------------------------------*/
158 * This function sets the final controller environment after training.
160 * @param[in,out] *TechPtr - Pointer to the MEM_TECH_BLOCK
166 IN OUT MEM_TECH_BLOCK *TechPtr
170 MEM_DATA_STRUCT *MemPtr;
173 NBPtr = TechPtr->NBPtr;
174 MemPtr = NBPtr->MemPtr;
176 LibAmdWriteCpuReg (CR4_REG, TechPtr->CR4reg);
178 LibAmdMsrRead (HWCR, (UINT64 *)&SMsr, &MemPtr->StdHeader);
179 SMsr.lo = TechPtr->HwcrLo;
180 LibAmdMsrWrite (HWCR, (UINT64 *)&SMsr, &MemPtr->StdHeader);
184 /*----------------------------------------------------------------------------
187 *----------------------------------------------------------------------------