7 * Common Recovery Northbridge function for training flow for DDR3
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/NB)
12 * @e \$Revision: 49896 $ @e \$Date: 2011-03-30 02:18:18 -0600 (Wed, 30 Mar 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
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29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
58 #include "OptionMemory.h"
64 #define FILECODE PROC_RECOVERY_MEM_NB_MRNTRAIN3_FILECODE
67 /*----------------------------------------------------------------------------
68 * DEFINITIONS AND MACROS
70 *----------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------
74 * TYPEDEFS AND STRUCTURES
76 *----------------------------------------------------------------------------
79 /*----------------------------------------------------------------------------
80 * PROTOTYPES OF LOCAL FUNCTIONS
82 *----------------------------------------------------------------------------
84 /* -----------------------------------------------------------------------------*/
87 * This function sets the training control flow
88 * The DDR3 mode bit must be set prior to calling this function
90 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
93 MemNRecTrainingFlowNb (
94 IN OUT MEM_NB_BLOCK *NBPtr
97 MemRecTTrainDQSWriteHw3 (NBPtr->TechPtr);
99 MemRecTTrainRcvrEnSw (NBPtr->TechPtr);
101 MemRecTTrainDQSPosSw (NBPtr->TechPtr);
104 /* -----------------------------------------------------------------------------*/
107 * This function sets the client training control flow
109 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
112 MemNRecTrainingFlowClientNb (
113 IN OUT MEM_NB_BLOCK *NBPtr
116 IDS_HDT_CONSOLE (MEM_STATUS, "\nStart serial training\n");
117 IDS_HDT_CONSOLE (MEM_STATUS, "Node %d\n", NBPtr->MCTPtr->DieId);
119 MemRecTTrainDQSWriteHw3 (NBPtr->TechPtr);
121 MemRecTTrainRcvrEnHw (NBPtr->TechPtr);
123 // Clear DisableCal and set DisablePredriverCal
124 NBPtr->FamilySpecificHook[ReEnablePhyComp] (NBPtr, NBPtr);
125 NBPtr->SetBitField (NBPtr, BFRxPtrInitReq, 1);
126 while (NBPtr->GetBitField (NBPtr, BFRxPtrInitReq) != 0) {}
127 NBPtr->SetBitField (NBPtr, BFDisDllShutdownSR, 1);
128 NBPtr->SetBitField (NBPtr, BFEnterSelfRef, 1);
129 while (NBPtr->GetBitField (NBPtr, BFEnterSelfRef) != 0) {}
130 IDS_HDT_CONSOLE (MEM_FLOW, "\tMemClkAlign = 2\n");
131 NBPtr->SetBitField (NBPtr, BFDbeGskMemClkAlignMode, 2);
132 NBPtr->SetBitField (NBPtr, BFExitSelfRef, 1);
133 while (NBPtr->GetBitField (NBPtr, BFExitSelfRef) != 0) {}
134 NBPtr->SetBitField (NBPtr, BFDisDllShutdownSR, 0);
136 MemRecTTrainDQSPosSw (NBPtr->TechPtr);
139 /* -----------------------------------------------------------------------------*/
143 * This function sets the Unb training control flow
145 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
148 MemNRecTrainingFlowUnb (
149 IN OUT MEM_NB_BLOCK *NBPtr
152 MemRecTTrainDQSWriteHw3 (NBPtr->TechPtr);
154 MemRecTTrainDQSPosSw (NBPtr->TechPtr);
156 MemRecTTrainRcvrEnHwSeedless (NBPtr->TechPtr);