7 * A sub-engine extracts WL and HW RxEn seeds from PSCFG tables.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Ps)
12 * @e \$Revision: 45233 $ @e \$Date: 2011-01-13 21:58:29 -0600 (Thu, 13 Jan 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
46 *----------------------------------------------------------------------------
49 *----------------------------------------------------------------------------
55 #include "AdvancedApi.h"
58 #include "cpuFamRegisters.h"
59 #include "cpuRegisters.h"
60 #include "OptionMemory.h"
61 #include "PlatformMemoryConfiguration.h"
66 #include "GeneralServices.h"
71 #define FILECODE PROC_MEM_PS_MPSEEDS_FILECODE
74 /*----------------------------------------------------------------------------
75 * DEFINITIONS AND MACROS
77 *----------------------------------------------------------------------------
80 /*----------------------------------------------------------------------------
81 * TYPEDEFS AND STRUCTURES
83 *----------------------------------------------------------------------------
85 /*----------------------------------------------------------------------------
86 * PROTOTYPES OF LOCAL FUNCTIONS
88 *----------------------------------------------------------------------------
91 MemPGetTrainingSeeds (
92 IN OUT MEM_NB_BLOCK *NBPtr,
93 IN MEM_PSC_TABLE_BLOCK *EntryOfTables
96 /*----------------------------------------------------------------------------
99 *----------------------------------------------------------------------------
101 /* -----------------------------------------------------------------------------*/
104 * A sub-function extracts WL and HW RxEn seeds from PSCFG tables
107 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
108 * @param[in] *EntryOfTables - Pointer to MEM_PSC_TABLE_BLOCK
110 * @return NBPtr->PsPtr->WLSeedVal
111 * @return NBPtr->PsPtr->HWRxENSeedVal
115 MemPGetTrainingSeeds (
116 IN OUT MEM_NB_BLOCK *NBPtr,
117 IN MEM_PSC_TABLE_BLOCK *EntryOfTables
126 CPU_LOGICAL_ID LogicalCpuid;
130 PSC_TBL_ENTRY **TblEntryPtr;
131 PSCFG_SEED_ENTRY *TblPtr;
132 CH_DEF_STRUCT *CurrentChannel;
134 CurrentChannel = NBPtr->ChannelPtr;
139 LogicalCpuid.Family = AMD_FAMILY_UNKNOWN;
140 MaxDimmPerCh = GetMaxDimmsPerChannel (NBPtr->RefPtr->PlatformMemoryConfiguration, NBPtr->MCTPtr->SocketId, CurrentChannel->ChannelID);
141 NOD = (UINT8) 1 << (MaxDimmPerCh - 1);
142 CH = 1 << (CurrentChannel->ChannelID);
144 if (CurrentChannel->RegDimmPresent != 0) {
145 DimmType = RDIMM_TYPE;
146 } else if (CurrentChannel->SODimmPresent != 0) {
147 DimmType = SODIMM_TYPE;
148 if (FindPSOverrideEntry (NBPtr->RefPtr->PlatformMemoryConfiguration, PSO_SOLDERED_DOWN_SODIMM_TYPE, NBPtr->MCTPtr->SocketId, NBPtr->ChannelPtr->ChannelID, 0, NULL, NULL) != NULL) {
149 DimmType = SODWN_SODIMM_TYPE;
151 } else if (CurrentChannel->LrDimmPresent != 0) {
152 DimmType = LRDIMM_TYPE;
154 DimmType = UDIMM_TYPE;
157 // Get seed value of WL, then HW RxEn
158 for (Seedloop = 0; Seedloop < 2; Seedloop++) {
159 TblEntryPtr = (Seedloop == 0) ? EntryOfTables->TblEntryOfWLSeed : EntryOfTables->TblEntryOfHWRxENSeed;
162 // Obtain table pointer, table size, Logical Cpuid and PSC type according to Dimm, NB and package type.
163 while (TblEntryPtr[i] != NULL) {
164 if (((TblEntryPtr[i])->Header.DimmType & DimmType) != 0) {
166 // Determine if this is the expected NB Type
168 LogicalCpuid = (TblEntryPtr[i])->Header.LogicalCpuid;
169 PackageType = (TblEntryPtr[i])->Header.PackageType;
170 if (MemPIsIdSupported (NBPtr, LogicalCpuid, PackageType)) {
171 TblPtr = (PSCFG_SEED_ENTRY *) ((TblEntryPtr[i])->TBLPtr);
172 TableSize = (TblEntryPtr[i])->TableSize;
179 // Check whether no table entry is found.
180 if (TblEntryPtr[i] == NULL) {
181 IDS_HDT_CONSOLE (MEM_FLOW, "\nNo %s training seeds Config table\n", (Seedloop == 0) ? "WL" : "HW RxEn");
185 for (i = 0; i < TableSize; i++) {
186 if ((TblPtr->DimmPerCh & NOD) != 0) {
187 if ((TblPtr->Channel & CH) != 0) {
189 NBPtr->PsPtr->WLSeedVal = (UINT8) TblPtr->SeedVal;
191 NBPtr->PsPtr->HWRxENSeedVal = TblPtr->SeedVal;
199 if (i == TableSize) {
200 IDS_HDT_CONSOLE (MEM_FLOW, "\nNo %s seed entries\n\n", (Seedloop == 0) ? "WL" : "HW RxEn");
201 PutEventLog (AGESA_ERROR, MEM_ERROR_TRAINING_SEED_NOT_FOUND, NBPtr->Node, NBPtr->Dct, NBPtr->Channel, 0, &NBPtr->MemPtr->StdHeader);
202 SetMemError (AGESA_ERROR, NBPtr->MCTPtr);
203 if (!NBPtr->MemPtr->ErrorHandling (NBPtr->MCTPtr, NBPtr->Dct, EXCLUDE_ALL_CHIPSEL, &NBPtr->MemPtr->StdHeader)) {