7 * A sub-engine which extracts MR0[WR] and MR0[CL] value.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Ps)
12 * @e \$Revision: 52114 $ @e \$Date: 2011-05-02 13:21:20 -0600 (Mon, 02 May 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
46 *----------------------------------------------------------------------------
49 *----------------------------------------------------------------------------
55 #include "AdvancedApi.h"
58 #include "OptionMemory.h"
59 #include "PlatformMemoryConfiguration.h"
63 #include "GeneralServices.h"
67 #define FILECODE PROC_MEM_PS_MPMR0_FILECODE
70 /*----------------------------------------------------------------------------
71 * DEFINITIONS AND MACROS
73 *----------------------------------------------------------------------------
75 /*----------------------------------------------------------------------------
76 * TYPEDEFS AND STRUCTURES
78 *----------------------------------------------------------------------------
80 /*----------------------------------------------------------------------------
81 * PROTOTYPES OF LOCAL FUNCTIONS
83 *----------------------------------------------------------------------------
87 IN OUT MEM_NB_BLOCK *NBPtr,
88 IN MEM_PSC_TABLE_BLOCK *EntryOfTables
91 /*----------------------------------------------------------------------------
94 *----------------------------------------------------------------------------
96 /* -----------------------------------------------------------------------------*/
99 * A sub-function which extracts MR0[WR] or MR0[CL] value from a input table and store the
100 * value to a specific address.
102 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
103 * @param[in] *EntryOfTables - Pointer to MEM_PSC_TABLE_BLOCK
105 * @return TRUE - Succeed in extracting the table value
106 * @return FALSE - Fail to extract the table value
111 IN OUT MEM_NB_BLOCK *NBPtr,
112 IN MEM_PSC_TABLE_BLOCK *EntryOfTables
122 CPU_LOGICAL_ID LogicalCpuid;
125 PSCFG_MR0CL_ENTRY *TblPtr;
127 CH_DEF_STRUCT *CurrentChannel;
129 CurrentChannel = NBPtr->ChannelPtr;
134 // Extract MR0[WR] value, then MR0[CL] value
135 for (i = 0; i < 2; i++) {
137 ptr = EntryOfTables->TblEntryOfMR0WR;
140 ptr = EntryOfTables->TblEntryOfMR0CL;
145 // Obtain table pointer, table size, Logical Cpuid and PSC type according to Dimm, NB and package type.
146 while (ptr[p] != NULL) {
148 // Determine if this is the expected NB Type
150 LogicalCpuid = (ptr[p])->Header.LogicalCpuid;
151 PackageType = (ptr[p])->Header.PackageType;
152 if (MemPIsIdSupported (NBPtr, LogicalCpuid, PackageType)) {
153 TblPtr = (PSCFG_MR0CL_ENTRY *) ((ptr[p])->TBLPtr);
154 TableSize = (ptr[p])->TableSize;
160 // Check whether no table entry is found.
161 if (ptr[p] == NULL) {
162 IDS_HDT_CONSOLE (MEM_FLOW, "\nNo MR0 table\n");
166 Value32 = (Type == PSCFG_MR0WR) ? NBPtr->GetBitField (NBPtr, BFTwrDDR3) : NBPtr->GetBitField (NBPtr, BFTcl);
167 for (j = 0; j < TableSize; j++, TblPtr++) {
168 if (Value32 == (UINT32) TblPtr->Timing) {
169 if (Type == PSCFG_MR0WR) {
170 NBPtr->PsPtr->MR0WR = (UINT8) TblPtr->Value;
173 NBPtr->PsPtr->MR0CL31 = (UINT8) TblPtr->Value;
174 NBPtr->PsPtr->MR0CL0 = (UINT8) TblPtr->Value1;
181 // If there is no entry, check if overriding value existed. If not, return FALSE.
183 PsoMaskMR0 = (UINT8) MemPProceedTblDrvOverride (NBPtr, NBPtr->RefPtr->PlatformMemoryConfiguration, ((i == 0) ? PSO_TBLDRV_MR0_WR : PSO_TBLDRV_MR0_CL));
184 if ((PsoMaskMR0 == 0) && (j == TableSize)) {
185 IDS_HDT_CONSOLE (MEM_FLOW, (i == 0) ? "\nNo MR0[WR] entries\n" : "\nNo MR0[CL] entries\n");
186 PutEventLog (AGESA_ERROR, MEM_ERROR_MR0_NOT_FOUND, NBPtr->Node, NBPtr->Dct, NBPtr->Channel, 0, &NBPtr->MemPtr->StdHeader);
187 SetMemError (AGESA_ERROR, NBPtr->MCTPtr);
188 if (!NBPtr->MemPtr->ErrorHandling (NBPtr->MCTPtr, NBPtr->Dct, EXCLUDE_ALL_CHIPSEL, &NBPtr->MemPtr->StdHeader)) {