7 * Platform specific settings for DR DDR3 U-DIMM system
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Ps)
12 * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
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21 * modification, are permitted provided that the following conditions are met:
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42 * ***************************************************************************
46 /* This file contains routine that add platform specific support L1 */
50 #include "AdvancedApi.h"
52 #include "PlatformMemoryConfiguration.h"
55 #include "cpuFamRegisters.h"
63 #define FILECODE PROC_MEM_PS_DR_MPUDR3_FILECODE
64 /*----------------------------------------------------------------------------
65 * DEFINITIONS AND MACROS
67 *----------------------------------------------------------------------------
70 /*----------------------------------------------------------------------------
71 * TYPEDEFS AND STRUCTURES
73 *----------------------------------------------------------------------------
76 /*----------------------------------------------------------------------------
77 * PROTOTYPES OF LOCAL FUNCTIONS
79 *----------------------------------------------------------------------------
84 IN OUT MEM_NB_BLOCK *NBPtr
88 *-----------------------------------------------------------------------------
91 *-----------------------------------------------------------------------------
93 STATIC CONST DRAM_TERM_ENTRY DrUDdr3DramTerm[] = {
94 {DDR800 + DDR1066 + DDR1333 + DDR1600, ONE_DIMM, NO_DIMM, 1, 0, 0},
95 {DDR800 + DDR1066, TWO_DIMM, NO_DIMM, 3, 0, 2},
96 {DDR1333, TWO_DIMM, NO_DIMM, 5, 0, 2},
97 {DDR1600, TWO_DIMM, NO_DIMM, 5, 0, 1}
99 /* -----------------------------------------------------------------------------*/
102 * This function is the constructor for the platform specific settings for U-DDR3 DR DDR3
104 * @param[in,out] *MemPtr Pointer to MEM_DATA_STRUCTURE
105 * @param[in,out] *ChannelPtr Pointer to CH_DEF_STRUCT
106 * @param[in,out] *PsPtr Pointer to MEM_PS_BLOCK
108 * @return AGESA_SUCCESS
113 MemPConstructPsUDr3 (
114 IN OUT MEM_DATA_STRUCT *MemPtr,
115 IN OUT CH_DEF_STRUCT *ChannelPtr,
116 IN OUT MEM_PS_BLOCK *PsPtr
119 ASSERT (MemPtr != 0);
120 ASSERT (ChannelPtr != 0);
122 if ((ChannelPtr->MCTPtr->LogicalCpuid.Family & AMD_FAMILY_10_RB) == 0) {
123 return AGESA_UNSUPPORTED;
125 if (ChannelPtr->TechType != DDR3_TECHNOLOGY) {
126 return AGESA_UNSUPPORTED;
128 if ((ChannelPtr->RegDimmPresent != 0) || (ChannelPtr->SODimmPresent != 0)) {
129 return AGESA_UNSUPPORTED;
131 PsPtr->MemPDoPs = MemPDoPsUDr3;
132 PsPtr->MemPGetPORFreqLimit = MemPGetPORFreqLimitDef;
133 return AGESA_SUCCESS;
136 /* -----------------------------------------------------------------------------*/
139 * This is function sets the platform specific settings for U-DDR3 DR DDR3
141 * @param[in,out] *NBPtr Pointer to MEM_NB_BLOCK
143 * @return TRUE - Find settings for corresponding platform and dimm population.
144 * @return FALSE - Fail to find settings for corresponding platform and dimm population.
151 IN OUT MEM_NB_BLOCK *NBPtr
154 if (!MemPGetDramTerm (NBPtr, GET_SIZE_OF (DrUDdr3DramTerm), DrUDdr3DramTerm)) {