7 * Or northbridge constructor for dimm identification translator.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/NB/OR)
12 * @e \$Revision: 51640 $ @e \$Date: 2011-04-26 03:42:21 -0600 (Tue, 26 Apr 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
58 #include "OptionMemory.h" // need def for MEM_FEAT_BLOCK_NB
61 #include "cpuRegisters.h"
62 #include "cpuFamRegisters.h"
63 #include "cpuFamilyTranslation.h"
69 #define FILECODE PROC_MEM_NB_OR_MNIDENDIMMOR_FILECODE
71 /*----------------------------------------------------------------------------
72 * DEFINITIONS AND MACROS
74 *----------------------------------------------------------------------------
78 /*----------------------------------------------------------------------------
79 * TYPEDEFS AND STRUCTURES
81 *----------------------------------------------------------------------------
84 /*----------------------------------------------------------------------------
85 * PROTOTYPES OF LOCAL FUNCTIONS
87 *----------------------------------------------------------------------------
90 MemNIdentifyDimmConstructorOr (
91 IN OUT MEM_NB_BLOCK *NBPtr,
92 IN OUT MEM_DATA_STRUCT *MemPtr,
99 IN OUT MEM_NB_BLOCK *NBPtr,
104 /*----------------------------------------------------------------------------
107 *----------------------------------------------------------------------------
110 /* -----------------------------------------------------------------------------*/
114 * This function initializes the northbridge block for dimm identification translator
116 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
117 * @param[in,out] *MemPtr - Pointer to the MEM_DATA_STRUCT
118 * @param[in,out] NodeID - ID of current node to construct
119 * @return TRUE - This is the correct constructor for the targeted node.
120 * @return FALSE - This isn't the correct constructor for the targeted node.
124 MemNIdentifyDimmConstructorOr (
125 IN OUT MEM_NB_BLOCK *NBPtr,
126 IN OUT MEM_DATA_STRUCT *MemPtr,
131 // Determine if this is the expected NB Type
133 GetLogicalIdOfSocket (MemPtr->DiesPerSystem[NodeID].SocketId, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid), &(MemPtr->StdHeader));
134 if (!MemNIsIdSupportedOr (NBPtr, &(MemPtr->DiesPerSystem[NodeID].LogicalCpuid))) {
138 NBPtr->NodeCount = MAX_NODES_SUPPORTED_OR;
139 NBPtr->DctCount = MAX_DCTS_PER_NODE_OR;
140 NBPtr->CsRegMsk = 0x7FF83FE0;
141 NBPtr->MemPtr = MemPtr;
142 NBPtr->MCTPtr = &(MemPtr->DiesPerSystem[NodeID]);
143 NBPtr->PciAddr.AddressValue = MemPtr->DiesPerSystem[NodeID].PciAddr.AddressValue;
144 NBPtr->Node = ((UINT8) NBPtr->PciAddr.Address.Device) - 24;
145 NBPtr->Ganged = FALSE;
146 MemNInitNBRegTableOr (NBPtr, NBPtr->NBRegTable);
147 NBPtr->MemNCmnGetSetFieldNb = MemNCmnGetSetFieldOr;
148 NBPtr->GetBitField = MemNGetBitFieldNb;
149 NBPtr->SetBitField = MemNSetBitFieldNb;
150 NBPtr->GetSocketRelativeChannel = MemNGetSocketRelativeChannelOr;
151 NBPtr->FamilySpecificHook[DCTSelectSwitch] = MemNDctCfgSelectUnb;
152 NBPtr->FamilySpecificHook[FixupSysAddr] = MemNFixupSysAddrOr;
155 MemNSetBitFieldNb (NBPtr, BFDctCfgSel, 0);
160 /* -----------------------------------------------------------------------------*/
163 * This function is used to workaround erratum 637
165 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
166 * @param[in] *SysAddrPtr - Pointer SysAddr variable
173 IN OUT MEM_NB_BLOCK *NBPtr,
179 UINT8 CoreStateSaveDestNode;
180 UINT64 Cc6BaseAddress;
185 // Save NBPtr->PciAddr, so it can be used later to access different node.
186 PciAddr = NBPtr->PciAddr;
188 SysAddr = *((UINT64 *) SysAddrPtr);
189 if ((SysAddr >> 24) == 0xFDF7) {
190 // Calculate the address of the source node
191 SourceNode = (UINT8) ((SysAddr >> 20) & 0x7);
193 // Find CoreStateSaveDestNode based on the access source
194 NBPtr->PciAddr.Address.Device = 0x18 + SourceNode;
195 CoreStateSaveDestNode = (UINT8) NBPtr->GetBitField (NBPtr, BFCoreStateSaveDestNode);
197 // Calculate Cc6BaseAddress from the destination node's DRAM Limit System Address
198 NBPtr->PciAddr.Address.Device = 0x18 + CoreStateSaveDestNode;
199 Cc6BaseAddress = ((UINT64) NBPtr->GetBitField (NBPtr, BFDramLimitAddr) << 27);
200 IntlvEn = NBPtr->GetBitField (NBPtr, BFDramIntlvEn);
202 // Check if Node Interleaving is enabled
204 // Node Interleaving is enabled, obtain the interleave position
205 IntlvSel = NBPtr->GetBitField (NBPtr, BFDramIntlvSel);
206 *((UINT64 *) SysAddrPtr) = Cc6BaseAddress | ((IntlvEn ^ 0x7) << 24) | ((SysAddr & 0xFFF000) * (IntlvEn + 1)) | (IntlvSel << 12) | (SysAddr & 0xFFF);
208 // Node Interleaving is disabled
209 *((UINT64 *) SysAddrPtr) = Cc6BaseAddress | (0x7 << 24) | (SysAddr & 0xFFFFFF);
213 // Restore NBPtr->PciAddr
214 NBPtr->PciAddr = PciAddr;