7 * Northbridge Non-SPD timings for Hydra
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/NB/HY)
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
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21 * modification, are permitted provided that the following conditions are met:
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23 * notice, this list of conditions and the following disclaimer.
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31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
59 #include "OptionMemory.h" // need def for MEM_FEAT_BLOCK_NB
65 #define FILECODE PROC_MEM_NB_HY_MNOTHY_FILECODE
66 /*----------------------------------------------------------------------------
67 * DEFINITIONS AND MACROS
69 *----------------------------------------------------------------------------
72 /*----------------------------------------------------------------------------
73 * TYPEDEFS AND STRUCTURES
75 *----------------------------------------------------------------------------
78 /*----------------------------------------------------------------------------
79 * PROTOTYPES OF LOCAL FUNCTIONS
81 *----------------------------------------------------------------------------
85 MemNSetOtherTimingHY (
86 IN OUT MEM_NB_BLOCK *NBPtr
93 IN OUT MEM_NB_BLOCK *NBPtr
97 /*----------------------------------------------------------------------------
100 *----------------------------------------------------------------------------
103 extern BUILD_OPT_CFG UserOptions;
105 /* -----------------------------------------------------------------------------*/
109 * This function sets the non-SPD timings
111 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
113 * @return TRUE - No fatal error occurs.
114 * @return FALSE - Fatal error occurs.
119 IN OUT MEM_NB_BLOCK *NBPtr
122 MemNSwitchDCTNb (NBPtr, 0);
123 if (NBPtr->DCTPtr->Timings.DctDimmValid > 0) {
124 MemNSetOtherTimingHY (NBPtr);
125 MemNPowerDownCtlNb (NBPtr);
126 MemNEnDLLShutDownHy (NBPtr);
129 MemNSwitchDCTNb (NBPtr, 1);
130 if ((NBPtr->DCTPtr->Timings.DctDimmValid > 0) && (NBPtr->MCTPtr->GangedMode == FALSE)) {
131 MemNSetOtherTimingHY (NBPtr);
132 MemNPowerDownCtlNb (NBPtr);
133 MemNEnDLLShutDownHy (NBPtr);
135 return (BOOLEAN) (NBPtr->MCTPtr->ErrCode < AGESA_FATAL);
138 /*----------------------------------------------------------------------------
141 *----------------------------------------------------------------------------
144 /* -----------------------------------------------------------------------------*/
148 * This function sets the non-SPD timings in PCI registers
150 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
156 MemNSetOtherTimingHY (
157 IN OUT MEM_NB_BLOCK *NBPtr
161 MemNSetBitFieldNb (NBPtr, BFTrdrd, MemNGetTrdrdNb (NBPtr));
162 MemNSetBitFieldNb (NBPtr, BFTwrwr, MemNGetTwrwrNb (NBPtr));
163 MemNSetBitFieldNb (NBPtr, BFTwrrd, MemNGetTwrrdNb (NBPtr));
164 MemNSetBitFieldNb (NBPtr, BFTrwtTO, MemNGetTrwtTONb (NBPtr));
165 MemNSetBitFieldNb (NBPtr, BFTrwtWB, MemNGetTrwtWBNb (NBPtr));
168 /* -----------------------------------------------------------------------------*/
172 * This function gets the ODT delays
174 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
182 IN OUT MEM_NB_BLOCK *NBPtr
188 // On revision D processors, the BIOS must additionally configure the ODT pattern
189 // and the ODT switching delays.
191 // Program F2x[1, 0]9C_x83 DRAM Phy ODT Assertion Control Register based on Burst length.
192 // -Read the Burst Length from F2x[1, 0]84[BurstCtrl].
193 // -Value of 2, BL = 4 else assume BL=8.
194 // -Initialize ODTDelays based on BL value
195 // -WrOdtOnDuration [14:12] = BL / 2 + 1
196 // -WrOdtTrnOnDly [10:8] = 0
197 // -RdOdtOnDuration [6:4] = BL / 2 + 1
199 ODTDelays = (MemNGetBitFieldNb (NBPtr, BFBurstCtrl) == 2) ? 0x00003030 : 0x00005050;
201 // RdOdtTrnOnDly [3:0] < (CL-CWL) or (CL-CWL - 1)
202 // See BKDG F2x[1, 0]9C_x83 DRAM Phy ODT Assertion Control Register [3:0]
203 Ld = ((INT8)MemNGetBitFieldNb (NBPtr, BFTcl) + 1) - ((INT8)MemNGetBitFieldNb (NBPtr, BFTcwl) + 5);
215 /* -----------------------------------------------------------------------------*/
219 * This function enables power down mode
221 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
229 IN OUT MEM_NB_BLOCK *NBPtr
232 MEM_PARAMETER_STRUCT *RefPtr;
235 RefPtr = NBPtr->RefPtr;
237 // we can't enable powerdown mode when doing WL
238 if (RefPtr->EnablePowerDown) {
239 MemNSetBitFieldNb (NBPtr, BFPowerDownEn, 1);
240 PowerDownMode = (UINT8) UserOptions.CfgPowerDownMode;
241 IDS_OPTION_HOOK (IDS_POWERDOWN_MODE, &PowerDownMode, &(NBPtr->MemPtr->StdHeader));
243 MemNSetBitFieldNb (NBPtr, BFPowerDownMode, 1);