7 * Northbridge support functions for Errata and early samples
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/NB/DR)
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
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28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
52 #include "OptionMemory.h" // need def for MEM_FEAT_BLOCK_NB
54 #include "cpuFamRegisters.h"
59 #define FILECODE PROC_MEM_NB_DR_MNPROTODR_FILECODE
61 /*----------------------------------------------------------------------------
62 * PROTOTYPES OF LOCAL FUNCTIONS
64 *----------------------------------------------------------------------------
68 MemNTrainFenceWHardCodeValDr (
69 IN OUT MEM_NB_BLOCK *NBPtr
73 *-----------------------------------------------------------------------------
76 *-----------------------------------------------------------------------------
79 /* -----------------------------------------------------------------------------*/
83 * This function conditionally executes specific Phy fence training function.
85 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
90 MemPPhyFenceTrainingDr (
91 IN OUT MEM_NB_BLOCK *NBPtr
94 if (NBPtr->GetBitField (NBPtr, BFDdr3Mode) == 0) {
96 if (NBPtr->MCTPtr->LogicalCpuid.Revision & AMD_F10_C0) {
97 MemNTrainFenceWHardCodeValDr (NBPtr);
99 MemNTrainPhyFenceNb (NBPtr);
103 MemNTrainPhyFenceNb (NBPtr);
107 /* -----------------------------------------------------------------------------*/
111 * This function executes hardcoded Phy fence training.
113 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
119 MemNTrainFenceWHardCodeValDr (
120 IN OUT MEM_NB_BLOCK *NBPtr
128 if (NBPtr->MCTPtr->NodeMemSize) {
129 for (Dct = 0; Dct < MAX_DCTS_PER_NODE_DR; Dct++) {
130 NBPtr->SwitchDCT (NBPtr, Dct);
131 Speed = NBPtr->DCTPtr->Timings.Speed;
132 NBPtr->SetBitField (NBPtr, BFPhyFence, ((Speed == DDR800_FREQUENCY) || (Speed == DDR1066_FREQUENCY)) ? 20 : 20);
133 NBPtr->SetBitField (NBPtr, BFSlowAccessMode, (NBPtr->ChannelPtr->SlowMode) ? 1 : 0);
134 NBPtr->SetBitField (NBPtr, BFODCControl, NBPtr->ChannelPtr->DctOdcCtl);
135 NBPtr->SetBitField (NBPtr, BFAddrTmgControl, NBPtr->ChannelPtr->DctAddrTmg);
139 NBPtr->SwitchDCT (NBPtr, CurDct);
142 /* -----------------------------------------------------------------------------*/
146 * This function executes Node memory 1GB boundary alignment.
148 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
149 * @param[in,out] *NodeSysLimit - Pointer to the NodeSysLimit
154 MemPNodeMemBoundaryDr (
155 IN OUT MEM_NB_BLOCK *NBPtr,
156 IN OUT UINT32 *NodeSysLimit
159 if (NBPtr->GetBitField (NBPtr, BFDdr3Mode) == 0) {
160 // only apply to DDR2.
161 if (*NodeSysLimit > ((UINT32)1 << (30 - 16))) {
162 // if (NodeSysLimit > 1GB) then set to Node limit to 1GB boundary for each node
164 *NodeSysLimit &= 0xFFFFC000;