7 * Main Memory Feature implementation file for UMA allocation.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Main)
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
56 #include "heapManager.h"
57 #include "OptionMemory.h"
66 #define FILECODE PROC_MEM_MAIN_MMUMAALLOC_FILECODE
67 /*----------------------------------------------------------------------------
68 * DEFINITIONS AND MACROS
70 *----------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------
74 * TYPEDEFS AND STRUCTURES
76 *----------------------------------------------------------------------------
79 /*----------------------------------------------------------------------------
80 * PROTOTYPES OF LOCAL FUNCTIONS
82 *----------------------------------------------------------------------------
86 IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr
89 /*-----------------------------------------------------------------------------
92 *-----------------------------------------------------------------------------
94 extern BUILD_OPT_CFG UserOptions;
96 /* -----------------------------------------------------------------------------*/
100 * UMA allocation mechanism.
102 * @param[in,out] *MemMainPtr - Pointer to the MEM_MAIN_DATA_BLOCK
107 IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr
116 UINT32 UmaAbove4GBase;
117 UINT32 UmaBelow4GBase;
118 BOOLEAN DctSelIntLvEn;
119 BOOLEAN UmaAbove4GEn;
121 ALLOCATE_HEAP_PARAMS AllocHeapParams;
122 UMA_INFO *UmaInfoPtr;
124 MEM_DATA_STRUCT *MemPtr;
126 MEM_PARAMETER_STRUCT *RefPtr;
128 MemPtr = MemMainPtr->MemPtr;
129 NBPtr = &(MemMainPtr->NBPtr[BSP_DIE]);
130 RefPtr = NBPtr->RefPtr;
133 SMsr.lo = SMsr.hi = 0;
136 UmaAlignment = (UINT32) UserOptions.CfgUmaAlignment;
137 UmaAbove4GEn = UserOptions.CfgUmaAbove4G;
138 DctSelIntLvEn = (NBPtr->GetBitField (NBPtr, BFDctSelIntLvEn) == 1) ? TRUE : FALSE;
139 TopOfChIntlv = NBPtr->GetBitField (NBPtr, BFDctSelBaseAddr) << (27 - 16);
140 DctSelHi = NBPtr->GetBitField (NBPtr, BFDctSelHi);
142 // Allocate heap for UMA_INFO
143 AllocHeapParams.RequestedBufferSize = sizeof (UMA_INFO);
144 AllocHeapParams.BufferHandle = AMD_UMA_INFO_HANDLE;
145 AllocHeapParams.Persist = HEAP_SYSTEM_MEM;
146 if (AGESA_SUCCESS != HeapAllocateBuffer (&AllocHeapParams, &MemPtr->StdHeader)) {
147 ASSERT(FALSE); // Could not allocate heap for Uma information.
150 UmaInfoPtr = (UMA_INFO *) AllocHeapParams.BufferPtr;
151 // Default all the fields of UMA_INFO
152 UmaInfoPtr->UmaMode = (UINT8) UMA_NONE;
153 UmaInfoPtr->UmaSize = 0;
154 UmaInfoPtr->UmaBase = 0;
155 UmaInfoPtr->UmaAttributes = 0;
156 UmaInfoPtr->MemClock = NBPtr->DCTPtr->Timings.TargetSpeed;
158 switch (RefPtr->UmaMode) {
163 UmaSize = RefPtr->UmaSize;
166 UmaSize = NBPtr->GetUmaSize (NBPtr);
174 //TOM scaled from [47:0] to [47:16]
175 LibAmdMsrRead (TOP_MEM, (UINT64 *)&SMsr, &(NBPtr->MemPtr->StdHeader));
176 TOM = (SMsr.lo >> 16) | (SMsr.hi << (32 - 16));
178 UmaBelow4GBase = (TOM - UmaSize) & UmaAlignment;
179 // Initialize Ref->UmaBase to UmaBelow4GBase
180 RefPtr->UmaBase = UmaBelow4GBase;
182 // Uma Above 4G support
184 //TOM2 scaled from [47:0] to [47:16]
185 LibAmdMsrRead (TOP_MEM2, (UINT64 *)&SMsr, &(NBPtr->MemPtr->StdHeader));
186 TOM2 = (SMsr.lo >> 16) | (SMsr.hi << (32 - 16));
188 UmaAbove4GBase = (TOM2 - UmaSize) & UmaAlignment;
189 //Set UmaAbove4GBase to 0 if UmaAbove4GBase is below 4GB
190 if (UmaAbove4GBase < _4GB_RJ16) {
193 if (UmaAbove4GBase != 0) {
194 RefPtr->UmaBase = UmaAbove4GBase;
195 // 1. TopOfChIntlv == 0 indicates that whole DCT0 and DCT1 memory are interleaved.
196 // 2. TopOfChIntlv >= TOM tells us :
197 // -All or portion of Uma region that above 4G is NOT interleaved.
198 // -Whole Uma region that below 4G is interleaved.
199 if (DctSelIntLvEn && (TopOfChIntlv >= TOM)) {
200 RefPtr->UmaBase = UmaBelow4GBase;
206 UmaInfoPtr->UmaMode = (UINT8) (RefPtr->UmaMode);
207 UmaInfoPtr->UmaBase = (UINT64) ((UINT64) RefPtr->UmaBase << 16);
209 if (RefPtr->UmaBase >= _4GB_RJ16) {
210 // UmaSize might be extended if it is 128MB or 256MB .. aligned, so update it.
211 RefPtr->UmaSize = TOM2 - UmaAbove4GBase;
213 MemNSetMTRRUmaRegionUCNb (NBPtr, &UmaAbove4GBase, &TOM2);
214 if (DctSelIntLvEn && (TopOfChIntlv == 0)) {
215 UmaInfoPtr->UmaAttributes = UMA_ATTRIBUTE_INTERLEAVE | UMA_ATTRIBUTE_ON_DCT0 | UMA_ATTRIBUTE_ON_DCT1;
217 // Entire UMA region is in the high DCT
218 UmaInfoPtr->UmaAttributes = (DctSelHi == 0) ? UMA_ATTRIBUTE_ON_DCT0 : UMA_ATTRIBUTE_ON_DCT1;
221 // UmaSize might be extended if it is 128MB or 256MB .. aligned, so update it.
222 RefPtr->UmaSize = TOM - UmaBelow4GBase;
224 NBPtr->UMAMemTyping (NBPtr);
225 if (DctSelIntLvEn && ((TopOfChIntlv == 0) || (TopOfChIntlv >= TOM))) {
226 UmaInfoPtr->UmaAttributes = UMA_ATTRIBUTE_INTERLEAVE | UMA_ATTRIBUTE_ON_DCT0 | UMA_ATTRIBUTE_ON_DCT1;
228 if (UmaBelow4GBase >= TopOfChIntlv) {
229 // Entire UMA region is in the high DCT
230 UmaInfoPtr->UmaAttributes = (DctSelHi == 0) ? UMA_ATTRIBUTE_ON_DCT0 : UMA_ATTRIBUTE_ON_DCT1;
231 } else if (TopOfChIntlv >= TOM) {
232 // Entire UMA region is in the low DCT
233 UmaInfoPtr->UmaAttributes = (DctSelHi == 1) ? UMA_ATTRIBUTE_ON_DCT0 : UMA_ATTRIBUTE_ON_DCT1;
235 // UMA region is in both DCT0 and DCT1
236 UmaInfoPtr->UmaAttributes = UMA_ATTRIBUTE_ON_DCT0 | UMA_ATTRIBUTE_ON_DCT1;
240 UmaInfoPtr->UmaSize = (RefPtr->UmaSize) << 16;
241 IDS_HDT_CONSOLE (MEM_FLOW, "UMA is allocated:\n\tBase: %x0000\n\tSize: %x0000\n", RefPtr->UmaBase, RefPtr->UmaSize);