7 * Main Memory Feature implementation file for Node Interleaving
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Main)
12 * @e \$Revision: 53955 $ @e \$Date: 2011-05-29 20:54:54 -0600 (Sun, 29 May 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
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42 * ***************************************************************************
47 *----------------------------------------------------------------------------
50 *----------------------------------------------------------------------------
55 #include "OptionMemory.h"
63 #define FILECODE PROC_MEM_MAIN_MMONLINESPARE_FILECODE
64 /*----------------------------------------------------------------------------
65 * PROTOTYPES OF LOCAL FUNCTIONS
67 *----------------------------------------------------------------------------
71 IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr
74 /*-----------------------------------------------------------------------------
77 *-----------------------------------------------------------------------------
80 /* -----------------------------------------------------------------------------*/
83 * Check and enable online spare on all nodes.
85 * @param[in,out] *MemMainPtr - Pointer to the MEM_MAIN_DATA_BLOCK
87 * @return TRUE - No fatal error occurs.
88 * @return FALSE - Fatal error occurs.
92 IN OUT MEM_MAIN_DATA_BLOCK *MemMainPtr
97 UINT8 FirstEnabledNode;
101 MEM_PARAMETER_STRUCT *RefPtr;
103 AGESA_TESTPOINT (TpProcMemOnlineSpareInit, &(MemMainPtr->MemPtr->StdHeader));
104 FirstEnabledNode = 0;
107 NBPtr = MemMainPtr->NBPtr;
108 RefPtr = NBPtr[BSP_DIE].RefPtr;
110 for (Node = 0; Node < MemMainPtr->DieCount; Node++) {
111 if (NBPtr[Node].FeatPtr->OnlineSpare (&NBPtr[Node])) {
113 // Record the first node that has spared dimm enabled
114 FirstEnabledNode = Node;
121 NBPtr[BSP_DIE].SharedPtr->CurrentNodeSysBase = 0;
122 BottomIO = (NBPtr[BSP_DIE].RefPtr->BottomIo & 0xF8) << 8;
123 // If the first node that has spared dimms does not have a system base smaller
124 // than bottomIO, then we don't need to reset the GStatus, as we don't need to
125 // remap memory hole.
126 if (NBPtr[FirstEnabledNode].MCTPtr->NodeSysBase < BottomIO) {
127 RefPtr->GStatus[GsbHWHole] = FALSE;
128 RefPtr->GStatus[GsbSpIntRemapHole] = FALSE;
129 RefPtr->GStatus[GsbSoftHole] = FALSE;
130 RefPtr->HoleBase = 0;
133 for (Node = 0; Node < MemMainPtr->DieCount; Node++) {
134 if (Node >= FirstEnabledNode) {
135 // Remap memory on nodes with node number larger than the first node that has spared dimms.
136 NBPtr[Node].MCTPtr->Status[SbHWHole] = FALSE;
137 NBPtr[Node].MCTPtr->Status[SbSWNodeHole] = FALSE;
138 NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelBaseAddr, 0);
139 NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelHiRngEn, 0);
140 NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelHi, 0);
141 NBPtr[Node].SetBitField (&NBPtr[Node], BFDctSelBaseOffset, 0);
142 NBPtr[Node].SetBitField (&NBPtr[Node], BFDramHoleAddrReg, 0);
143 NBPtr[Node].HtMemMapInit (&NBPtr[Node]);
145 // No change is needed in the memory map of this node.
146 // Need to adjust the current system base for other nodes processed later.
147 NBPtr[Node].SharedPtr->CurrentNodeSysBase = (NBPtr[Node].MCTPtr->NodeSysLimit + 1) & 0xFFFFFFF0;
148 // If the current node does not have the memory hole, then set DramHoleAddrReg to be 0.
149 // If memory hoisting is enabled later by other node, SyncAddrMapToAllNodes will set the base
150 // and DramMemHoistValid.
151 // Otherwise, do not change the register value, as we need to keep DramHoleOffset unchanged, as well
153 if (!NBPtr[Node].MCTPtr->Status[SbHWHole]) {
154 NBPtr[Node].SetBitField (&NBPtr[Node], BFDramHoleAddrReg, 0);
159 for (Node = 0; Node < MemMainPtr->DieCount; Node++) {
160 NBPtr[Node].SyncAddrMapToAllNodes (&NBPtr[Node]);
161 RetVal &= (BOOLEAN) (NBPtr[Node].MCTPtr->ErrCode < AGESA_FATAL);
163 NBPtr[BSP_DIE].CpuMemTyping (&NBPtr[BSP_DIE]);