7 * Feature applies Node memory interleaving
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: (Mem/Feat/Ndintlv)
12 * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
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21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
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28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 * ***************************************************************************
48 *----------------------------------------------------------------------------
51 *----------------------------------------------------------------------------
67 #define FILECODE PROC_MEM_FEAT_NDINTLV_MFNDI_FILECODE
68 /*----------------------------------------------------------------------------
69 * DEFINITIONS AND MACROS
71 *----------------------------------------------------------------------------
73 #define _4GB_ (0x10000)
75 /*----------------------------------------------------------------------------
76 * TYPEDEFS AND STRUCTURES
78 *----------------------------------------------------------------------------
81 /*----------------------------------------------------------------------------
82 * PROTOTYPES OF LOCAL FUNCTIONS
84 *----------------------------------------------------------------------------
88 MemFCheckInterleaveNodes (
89 IN OUT MEM_NB_BLOCK *NBPtr
92 /*----------------------------------------------------------------------------
95 *----------------------------------------------------------------------------
98 /* -----------------------------------------------------------------------------*/
101 * Perform a check to see if node interleaving can be enabled on each node.
103 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
105 * @return TRUE - Node interleaving can be enabled.
106 * @return FALSE - Node interleaving cannot be enabled.
110 MemFCheckInterleaveNodes (
111 IN OUT MEM_NB_BLOCK *NBPtr
116 ASSERT (NBPtr != NULL);
118 MCTPtr = NBPtr->MCTPtr;
120 if (MCTPtr->NodeMemSize != 0) {
121 if (!NBPtr->SharedPtr->NodeIntlv.IsValid) {
122 NBPtr->SharedPtr->NodeIntlv.NodeMemSize = MCTPtr->NodeMemSize;
123 NBPtr->SharedPtr->NodeIntlv.Dct0MemSize = MCTPtr->DctData[0].Timings.DctMemSize;
124 NBPtr->SharedPtr->NodeIntlv.IsValid = TRUE;
126 if ((NBPtr->SharedPtr->NodeIntlv.NodeMemSize != MCTPtr->NodeMemSize) ||
127 (NBPtr->SharedPtr->NodeIntlv.Dct0MemSize != MCTPtr->DctData[0].Timings.DctMemSize)) {
135 /* -----------------------------------------------------------------------------*/
138 * Applies Node memory interleaving for each node.
140 * @param[in,out] *NBPtr - Pointer to the MEM_NB_BLOCK
142 * @return TRUE - This feature is enabled.
143 * @return FALSE - This feature is not enabled.
147 MemFInterleaveNodes (
148 IN OUT MEM_NB_BLOCK *NBPtr
161 MEM_PARAMETER_STRUCT *RefPtr;
164 ASSERT (NBPtr != NULL);
166 RefPtr = NBPtr->RefPtr;
167 MCTPtr = NBPtr->MCTPtr;
168 if (RefPtr->GStatus[GsbSoftHole] || RefPtr->GStatus[GsbHWHole]) {
169 HoleBase = RefPtr->HoleBase;
170 HoleSize = _4GB_ - HoleBase;
176 NodeCnt = NBPtr->SharedPtr->NodeIntlv.NodeCnt;
177 Dct0MemSize = NBPtr->SharedPtr->NodeIntlv.Dct0MemSize;
178 MemSize = NBPtr->SharedPtr->NodeIntlv.NodeMemSize;
180 BitShift = LibAmdBitScanForward (NodeCnt);
181 Dct0MemSize <<= BitShift;
183 RefPtr->GStatus[GsbHWHole] = TRUE;
184 HoleOffset = HoleSize;
185 if (Dct0MemSize >= HoleBase) {
186 Dct0MemSize += HoleSize;
188 HoleOffset += Dct0MemSize;
194 MemSize = (MemSize << BitShift) + HoleSize;
196 MCTPtr->NodeSysBase = 0;
197 MCTPtr->NodeSysLimit = MemSize - 1;
198 RefPtr->SysLimit = MemSize - 1;
200 // When node interleaving is enabled with larger than 1012GB memory,
201 // system memory limit will be lowered to fill in HT reserved region.
202 // TOP_MEM2 was set in CpuMemTyping and needs to be updated as well.
203 if (RefPtr->SysLimit >= HT_REGION_BASE_RJ16) {
204 if (RefPtr->LimitMemoryToBelow1Tb) {
205 SMsr.hi = HT_REGION_BASE_RJ16 >> (32 - 16);
206 SMsr.lo = HT_REGION_BASE_RJ16 << 16;
208 SMsr.hi = MemSize >> (32 - 16);
209 SMsr.lo = MemSize << 16;
211 LibAmdMsrWrite (TOP_MEM2, (UINT64 *)&SMsr, &(NBPtr->MemPtr->StdHeader));
212 IDS_HDT_CONSOLE (MEM_FLOW, "TOP_MEM2: %08x0000\n", MemSize);
213 RefPtr->Sub1THoleBase = HT_REGION_BASE_RJ16;
214 RefPtr->SysLimit = HT_REGION_BASE_RJ16 - 1;
216 RefPtr->Sub1THoleBase = RefPtr->SysLimit + 1;
219 NBPtr->SetBitField (NBPtr, BFDramIntlvSel, NBPtr->SharedPtr->NodeIntlv.NodeIntlvSel);
220 NBPtr->SetBitField (NBPtr, BFDramBaseAddr, 0);
221 NBPtr->SetBitField (NBPtr, BFDramIntlvEn, NodeCnt - 1);
222 NBPtr->SetBitField (NBPtr, BFDramLimitAddr, (MemSize - 1) >> (27 - 16));
225 MCTPtr->Status[SbHWHole] = TRUE;
226 // DramHoleBase will be set when sync address map to other nodes.
227 NBPtr->SetBitField (NBPtr, BFDramHoleOffset, HoleOffset >> (23 - 16));
228 NBPtr->SetBitField (NBPtr, BFDramHoleValid, 1);
231 if ((MCTPtr->DctData[1].Timings.DctMemSize != 0) && (!NBPtr->Ganged)) {
232 NBPtr->SetBitField (NBPtr, BFDctSelBaseAddr, Dct0MemSize >> (27 - 16));
233 NBPtr->SetBitField (NBPtr, BFDctSelBaseOffset, Dct0MemSize >> (26 - 16));
236 NodeSysBase = NodeCnt - 1;
237 NodeSysLimit = ((MemSize - 1)& 0xFFFFFF00) | NBPtr->SharedPtr->NodeIntlv.NodeIntlvSel;
238 NBPtr->SharedPtr->NodeMap[NBPtr->Node].IsValid = TRUE;
239 NBPtr->SharedPtr->NodeMap[NBPtr->Node].SysBase = NodeSysBase;
240 NBPtr->SharedPtr->NodeMap[NBPtr->Node].SysLimit = NodeSysLimit;
242 NBPtr->SharedPtr->NodeIntlv.NodeIntlvSel++;