7 * This file provides definitions used in common by HT internal modules. The
8 * data is private and not for external client access.
9 * Definitions include the HT global internal state data structures, and
10 * access to the available HT features from the main HT entry point.
12 * This file includes the feature constructor and feature support which is not
13 * removed with various build options.
15 * @xrefitem bom "File Content Label" "Release Content"
17 * @e sub-project: HyperTransport
18 * @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
22 *****************************************************************************
24 * Copyright (C) 2012 Advanced Micro Devices, Inc.
25 * All rights reserved.
27 * Redistribution and use in source and binary forms, with or without
28 * modification, are permitted provided that the following conditions are met:
29 * * Redistributions of source code must retain the above copyright
30 * notice, this list of conditions and the following disclaimer.
31 * * Redistributions in binary form must reproduce the above copyright
32 * notice, this list of conditions and the following disclaimer in the
33 * documentation and/or other materials provided with the distribution.
34 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
35 * its contributors may be used to endorse or promote products derived
36 * from this software without specific prior written permission.
38 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
39 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
40 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
42 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
43 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
44 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
45 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
47 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
49 * ***************************************************************************
57 * @page htimplfeat HT Features Implementation Guide
59 * HT Features provides access to the HT Feature set, in a manner that isolates
60 * calling code from knowledge about the Feature set implementation or which
61 * features are supported in the current build. In the case of feature sets, this
62 * is mostly used for build options to reduce code size by removing unneeded features.
64 * @par Adding a Method to HT Features
66 * To add a new method to the HT Features, follow these steps.
68 * <li> Create a typedef for the Method with the correct parameters and return type.
71 * <li> Name the method typedef (F_METHOD_NAME)(), where METHOD_NAME is the same name as the method table item,
72 * but with "_"'s and UPPERCASE, rather than mixed case.
73 * @n <tt> typedef VOID (F_METHOD_NAME)(); </tt> @n
75 * <li> Make a reference type for references to a method implementation:
76 * @n <tt> /// Reference to a Method </tt>
77 * @n <tt> typedef F_METHOD_NAME *PF_METHOD_NAME </tt> @n
80 * <li> Provide a standard doxygen function preamble for the Method typedef. Begin the
81 * detailed description by providing a reference to the method instances page by including
88 * @note It is important to provide documentation for the method type, because the method may not
89 * have an implementation in any families supported by the current package. @n
91 * <li> Add to the _HT_FEATURES struct an item for the Method:
92 * @n <tt> PF_METHOD_NAME MethodName; ///< Method: description. </tt> @n
95 * @par Implementing an HT Features Instance of the method.
97 * To implement an instance of a method for a specific feature follow these steps.
99 * - In appropriate files, implement the method with the return type and parameters
100 * matching the method typedef.
102 * - Name the function MethodName().
104 * - Create a doxygen function preamble for the method instance. Begin the detailed description with
105 * an Implements command to reference the method type and add this instance to the Method Instances page.
108 * * @HtFeatMethod{::F_METHOD_NAME}.
112 * - To access other Ht feature routines or data as part of the method implementation, the function
113 * must use HtFeatures->OtherMethod(). Do not directly access other HT feature
114 * routines, because in the table there may be overrides or this routine may be shared by multiple configurations.
116 * - Add the instance to the HT_FEATURES instances.
118 * - If a configuration does not need an instance of the method use one of the CommonReturns from
119 * CommonReturns.h with the same return type.
121 * @par Invoking HT Features Methods.
123 * The first step is carried out only once by the top level HT entry point.
125 * HT_FEATURES HtFeatures;
126 * // Get the current HT Feature Set
127 * NewHtFeatures (&HtFeatures);
128 * State->HtFeatures = &HtFeatures;
131 * The following example shows how to invoke a HT Features method.
133 * State->HtFeatures->MethodName ();
138 /*----------------------------------------------------------------------------
139 * Mixed (DEFINITIONS AND MACROS / TYPEDEFS, STRUCTURES, ENUMS)
141 *----------------------------------------------------------------------------
144 /*-----------------------------------------------------------------------------
145 * DEFINITIONS AND MACROS
147 *-----------------------------------------------------------------------------
149 #define MAX_PLATFORM_LINKS 64
150 #define MAX_LINK_PAIRS 4
152 /* These following are internal definitions */
153 #define ROUTE_TO_SELF 0x0F
154 #define INVALID_LINK 0xCC /* Used in port list data structure to mark unused data entries.
155 Can also be used for no Link found in a port list search */
157 /* definitions for working with the port list structure */
158 #define PORTLIST_TYPE_CPU 0
159 #define PORTLIST_TYPE_IO 1
162 * Hypertransport Capability definitions and macros
166 #define HT_INTERFACE_CAP_SUBTYPE_MASK ((UINT32)0xE00000FF)
167 #define HT_CAP_SUBTYPE_MASK ((UINT32)0xF80000FF)
169 /* HT Host Capability */
170 #define HT_HOST_CAPABILITY 1
171 #define HT_HOST_CAP_SIZE 0x20
173 /* Host CapabilityRegisters */
174 #define HTHOST_LINK_CAPABILITY_REG 0x00
175 #define HTHOST_LINK_CONTROL_REG 0x04
176 #define HTHOST_FREQ_REV_REG 0x08
177 #define HTHOST_REV_REV3 0x60
178 #define HTHOST_FEATURE_CAP_REG 0x0C
179 #define HTHOST_BUFFER_COUNT_REG 0x10
180 #define HTHOST_ISOC_REG 0x14
181 #define HTHOST_LINK_TYPE_REG 0x18
182 #define HTHOST_FREQ_EXTENSION 0x1C
183 #define HTHOST_TYPE_COHERENT 3
184 #define HTHOST_TYPE_NONCOHERENT 7
185 #define HTHOST_TYPE_MASK 0x1F
187 /* HT Slave Capability (HT1 compat) */
188 #define HT_SLAVE_CAPABILITY 0
189 #define HTSLAVE_LINK01_OFFSET 4
190 #define HTSLAVE_LINK_CONTROL_0_REG 4
191 #define HTSLAVE_FREQ_REV_0_REG 0xC
192 #define HTSLAVE_FEATURECAP_REG 0x10
193 #define HT_CONTROL_CLEAR_CRC (~(3 << 8))
194 #define HT_FREQUENCY_CLEAR_LINK_ERRORS (~(0x7 << 12))
197 /* HT3 gen Capability */
198 #define HT_GEN3_CAPABILITY (0xD << 1)
199 #define HTGEN3_LINK01_OFFSET 0x10
200 #define HTGEN3_LINK_TRAINING_0_REG 0x10
202 /* HT3 Retry Capability */
203 #define HT_RETRY_CAPABILITY (0xC << 1)
204 #define HTRETRY_CONTROL_REG 4
206 /* Unit ID Clumping Capability */
207 #define HT_UNITID_CAPABILITY (0x9 << 1)
208 #define HTUNIT_SUPPORT_REG 4
209 #define HTUNIT_ENABLE_REG 8
210 #define HT_CLUMPING_PASSIVE 1
212 /*----------------------------------------------------------------------------
213 * TYPEDEFS, STRUCTURES, ENUMS
215 *----------------------------------------------------------------------------
218 // Forward declarations.
219 /// Used for forward reference.
220 typedef struct _NORTHBRIDGE NORTHBRIDGE;
221 /// Used for forward reference.
222 typedef struct _HT_FEATURES HT_FEATURES;
223 /// Used for forward reference.
224 typedef struct _HT_INTERFACE HT_INTERFACE;
227 * Coherent Init Data.
229 * Metrics representing the coherent fabric which was discovered: Degree of nodes, adjacency,
230 * node numbering permutations, and the topology which it matched.
233 /** The number of coherent Links connected on each Node (the 'Degree' of the Node) */
234 UINT8 SysDegree[MAX_NODES];
235 /** The systems adjacency (sysMatrix[i][j] is true if Node_i has a Link to Node_j) */
236 BOOLEAN SysMatrix[MAX_NODES][MAX_NODES];
238 UINT8 DbDegree[MAX_NODES]; /**< Like sysDegree, but for the current database topology */
239 BOOLEAN DbMatrix[MAX_NODES][MAX_NODES]; /**< Like sysMatrix, but for the current database topology */
241 UINT8 Perm[MAX_NODES]; /**< The Node mapping from the system to the database */
242 UINT8 ReversePerm[MAX_NODES]; /**< The Node mapping from the database to the system */
243 UINT8 *MatchedTopology; /**< The topology that matched the current system or NULL */
247 * Represent the system as Links of matched port pairs.
248 * A pair consists of a source Node, a Link to the destination Node, the
249 * destination Node, and its Link back to source Node. The even indices are
250 * the source Nodes and Links, and the odd indices are for the destination
252 * @note The Port pair 2*N and 2*N+1 are connected together to form a Link
253 * (e.g. 0,1 and 8,9 are ports on either end of an HT Link) The lower number
254 * port (2*N) is the source port. The device that owns the source port is
255 * always the device closer to the BSP. (i.e. nearer the CPU in a
256 * non-coherent chain, or the CPU with the lower NodeID).
259 /* This section is where the Link is in the system and how to find it */
260 UINT8 Type; /**< 0 = CPU, 1 = Device, all others reserved */
261 UINT8 Link; /**< 0-1 for devices, 0-7 for CPUs */
262 UINT8 NodeID; /**< The Node, or a pointer to the devices parent Node */
263 UINT8 HostLink; /**< For Devices, the root CPU's Link to the chain */
264 UINT8 HostDepth; /**< Link Depth in chain, only used by devices */
265 PCI_ADDR Pointer; /**< A pointer to the device's slave HT capability, so we don't have to keep searching */
267 /* This section is for the final settings, which are written to hardware */
268 BOOLEAN SelRegang; /**< Indicates to software regang Link, only used for CPU->CPU Links */
269 UINT8 SelWidthIn; /**< Width in setting */
270 UINT8 SelWidthOut; /**< Width out setting */
271 UINT8 SelFrequency; /**< Frequency setting */
273 /* This section is for keeping track of capabilities and possible configurations */
274 BOOLEAN RegangCap; /**< Is the port capable of reganging? CPUs only */
275 UINT32 PrvFrequencyCap; /**< Possible frequency settings */
276 UINT8 PrvWidthInCap; /**< Possible Width setting */
277 UINT8 PrvWidthOutCap; /**< Possible Width setting */
278 UINT32 CompositeFrequencyCap; /**< Possible Link frequency setting */
279 UINT32 ClumpingSupport; /**< Unit ID Clumping value (bit 0 = passive support) */
282 /// Reference to a set of PORT_DESCRIPTORs.
283 typedef PORT_DESCRIPTOR (*PORT_LIST)[MAX_PLATFORM_LINKS*2];
286 * Our global state data structure
289 AMD_HT_INTERFACE *HtBlock; /**< The input data structure. */
291 UINT8 NodesDiscovered; /**< One less than the number of Nodes found in the system */
292 UINT8 TotalLinks; /**< How many HT Links have we discovered so far. */
293 UINT8 SysMpCap; /**< The maximum number of Nodes that all processors are capable of */
294 AGESA_STATUS MaxEventClass; /**< The event class of the highest severity event generated */
296 PORT_LIST PortList; /**< Represent the system as a set of Links, each two Ports. */
297 COHERENT_FABRIC *Fabric; /**< Describe metrics about the coherent fabric.
298 * Limited scope to CoherentInit(). */
299 /* Data interface to other Agesa Modules */
300 SOCKET_DIE_TO_NODE_MAP SocketDieToNodeMap; /**< For each Socket, Die the Node ids */
301 NODE_TO_SOCKET_DIE_MAP NodeToSocketDieMap; /**< For each Node id, Socket and Die */
302 HOP_COUNT_TABLE *HopCountTable; /**< Table of hops between nodes */
304 /* Data for non-coherent initialization */
305 UINT8 AutoBusCurrent; /**< The next bus number available */
306 UINT8 UsedCfgMapEntries; /**< The next Config address Map set available, Limit 4 (F1X[EC:E0]) */
307 BOOLEAN IsUsingRecoveryHt; /**< Manual BUID Swap List processing should assume that HT Recovery was used */
308 BOOLEAN IsSetHtCrcFlood; /**< Enable setting of HT CRC Flood */
309 BOOLEAN IsUsingUnitIdClumping; /**< Enable automatic Unit Id Clumping configuration. */
311 HT_INTERFACE *HtInterface; /**< Interface for feature code to external parameters */
312 HT_FEATURES *HtFeatures; /**< The current feature implementations */
313 NORTHBRIDGE *Nb; /**< The current northbridge */
315 PLATFORM_CONFIGURATION *PlatformConfiguration; /**< The platform specific configuration customizations */
316 VOID *ConfigHandle; /**< Config Pointer, opaque handle for passing to lib */
320 // Feature Method types
324 * Discover all coherent devices in the system.
328 * @param[in,out] State our global state
331 typedef VOID F_COHERENT_DISCOVERY (
332 IN OUT STATE_DATA *State
334 /// Reference to a method.
335 typedef F_COHERENT_DISCOVERY *PF_COHERENT_DISCOVERY;
338 * Using the description of the fabric topology we discovered, try to find a match
339 * among the supported topologies.
343 * @param[in,out] State the discovered fabric, degree matrix, permutation
346 typedef VOID F_LOOKUP_COMPUTE_AND_LOAD_ROUTING_TABLES (
347 IN OUT STATE_DATA *State
349 /// Reference to a method.
350 typedef F_LOOKUP_COMPUTE_AND_LOAD_ROUTING_TABLES *PF_LOOKUP_COMPUTE_AND_LOAD_ROUTING_TABLES;
353 * Make a Hop Count Table for the installed topology.
357 * @param[in,out] State access topology, permutation, update hop table
360 typedef VOID F_MAKE_HOP_COUNT_TABLE (
361 IN OUT STATE_DATA *State
363 /// Reference to a method.
364 typedef F_MAKE_HOP_COUNT_TABLE *PF_MAKE_HOP_COUNT_TABLE;
367 * Process a non-coherent Link.
371 * @param[in] Node Node on which to process nc init
372 * @param[in] Link The non-coherent Link on that Node
373 * @param[in] IsCompatChain Is this the chain with the southbridge? TRUE if yes.
374 * @param[in,out] State our global state
376 typedef VOID F_PROCESS_LINK (
379 IN BOOLEAN IsCompatChain,
380 IN OUT STATE_DATA *State
382 /// Reference to a method.
383 typedef F_PROCESS_LINK *PF_PROCESS_LINK;
386 * Get Link features into system data structure.
390 * @param[in] State our global state, port list
392 typedef VOID F_GATHER_LINK_DATA (
395 /// Reference to a method.
396 typedef F_GATHER_LINK_DATA *PF_GATHER_LINK_DATA;
403 * @param[in,out] State Process and update portlist
405 typedef VOID F_SELECT_OPTIMAL_WIDTH_AND_FREQUENCY (
406 IN OUT STATE_DATA *State
408 /// Reference to a method.
409 typedef F_SELECT_OPTIMAL_WIDTH_AND_FREQUENCY *PF_SELECT_OPTIMAL_WIDTH_AND_FREQUENCY;
412 * Change the hardware state for all Links according to the now optimized data in the
413 * port list data structure.
417 * @param[in] State our global state, port list
419 typedef VOID F_SET_LINK_DATA (
422 /// Reference to a method.
423 typedef F_SET_LINK_DATA *PF_SET_LINK_DATA;
426 * Retry must be enabled on all coherent links if it is enabled on any coherent links.
430 * @param[in,out] State global state, port frequency settings.
432 * @retval TRUE Fixup occurred, all coherent links HT1
433 * @retval FALSE No changes
435 typedef BOOLEAN F_IS_COHERENT_RETRY_FIXUP (
438 /// Reference to a method.
439 typedef F_IS_COHERENT_RETRY_FIXUP *PF_IS_COHERENT_RETRY_FIXUP;
443 * Test the subLinks of a Link to see if they qualify to be reganged.
447 * @param[in,out] State Our global state
449 typedef VOID F_REGANG_LINKS (
450 IN OUT STATE_DATA *State
452 /// Reference to a method.
453 typedef F_REGANG_LINKS *PF_REGANG_LINKS;
456 * Iterate through all Links, checking the frequency of each subLink pair.
460 * @param[in,out] State Link state and port list
463 typedef VOID F_SUBLINK_RATIO_FIXUP (
464 IN OUT STATE_DATA *State
466 /// Reference to a method.
467 typedef F_SUBLINK_RATIO_FIXUP *PF_SUBLINK_RATIO_FIXUP;
470 * Identify Links which can have traffic distribution.
474 * @param[in] State port list data
476 typedef VOID F_TRAFFIC_DISTRIBUTION (
479 /// Reference to a method.
480 typedef F_TRAFFIC_DISTRIBUTION *PF_TRAFFIC_DISTRIBUTION;
483 * Access HT Link Control Register.
487 * @param[in] Reg the PCI config address the control register
488 * @param[in] HiBit the high bit number
489 * @param[in] LoBit the low bit number
490 * @param[in] Value the value to write to that bit range. Bit 0 => loBit.
491 * @param[in] State Our state, config handle for lib
493 typedef VOID F_SET_HT_CONTROL_REGISTER_BITS (
500 /// Reference to a method.
501 typedef F_SET_HT_CONTROL_REGISTER_BITS *PF_SET_HT_CONTROL_REGISTER_BITS;
504 * Translate a desired width setting to the bits to set in the register field.
508 * @param[in] Value the width Value
510 * @return The bits for the register
512 typedef UINT8 F_CONVERT_WIDTH_TO_BITS (
515 /// Reference to a method.
516 typedef F_CONVERT_WIDTH_TO_BITS *PF_CONVERT_WIDTH_TO_BITS;
519 * HT Feature Methods.
521 * Provides abstract methods which are bound to specific feature implementations.
523 struct _HT_FEATURES {
524 PF_COHERENT_DISCOVERY CoherentDiscovery; /**< Method: Coherent Discovery. */
525 PF_LOOKUP_COMPUTE_AND_LOAD_ROUTING_TABLES LookupComputeAndLoadRoutingTables;
526 /**< Method: Route the discovered system */
527 PF_MAKE_HOP_COUNT_TABLE MakeHopCountTable; /**< Method: Compute slit hop counts */
528 PF_PROCESS_LINK ProcessLink; /**< Method: Process a non-coherent Link. */
529 PF_GATHER_LINK_DATA GatherLinkData; /**< Method: Gather Link Capabilities and data. */
530 PF_SELECT_OPTIMAL_WIDTH_AND_FREQUENCY SelectOptimalWidthAndFrequency;
531 /**< Method: Optimize link features. */
532 PF_REGANG_LINKS RegangLinks; /**< Method: Regang Sublinks. */
533 PF_SUBLINK_RATIO_FIXUP SubLinkRatioFixup; /**< Method: Fix Sublink Frequency ratios */
534 PF_IS_COHERENT_RETRY_FIXUP IsCoherentRetryFixup;
535 /**< Method: Fix Retry mixed on coherent links. */
536 PF_SET_LINK_DATA SetLinkData; /**< Method: Set optimized values. */
537 PF_TRAFFIC_DISTRIBUTION TrafficDistribution; /**< Method: Detect and Initialize Traffic Distribution */
538 PF_SET_HT_CONTROL_REGISTER_BITS SetHtControlRegisterBits; /**< Method: Access HT Link Control Reg. */
539 PF_CONVERT_WIDTH_TO_BITS ConvertWidthToBits; /**< Method: Convert a bit width to the value used for register setting. */
542 /*----------------------------------------------------------------------------
545 *----------------------------------------------------------------------------
549 * Provide the current Feature set implementation.
551 * Add an implementation reference for the constructor, just to make sure the page is created.
552 * @HtFeatMethod{_HT_FEATURES}.
557 OUT HT_FEATURES *HtFeatures,
558 IN AMD_CONFIG_PARAMS *StdHeader
562 #endif /* _HT_FEAT_H_ */