AGESA F15: AMD family15 AGESA code
[coreboot.git] / src / vendorcode / amd / agesa / f15 / Proc / HT / Fam10 / htNbFam10.c
1 /* $NoKeywords:$ */
2 /**
3  * @file
4  *
5  * Initializers for Family 10h northbridge support.
6  *
7  * @xrefitem bom "File Content Label" "Release Content"
8  * @e project:      AGESA
9  * @e sub-project:  HyperTransport
10  * @e \$Revision: 56279 $   @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
11  *
12  */
13 /*
14 *****************************************************************************
15 *
16 * Copyright (C) 2012 Advanced Micro Devices, Inc.
17 * All rights reserved.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions are met:
21 *     * Redistributions of source code must retain the above copyright
22 *       notice, this list of conditions and the following disclaimer.
23 *     * Redistributions in binary form must reproduce the above copyright
24 *       notice, this list of conditions and the following disclaimer in the
25 *       documentation and/or other materials provided with the distribution.
26 *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
27 *       its contributors may be used to endorse or promote products derived
28 *       from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
34 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
35 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
36 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
37 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
39 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * ***************************************************************************
42 *
43 */
44
45 /*
46  *----------------------------------------------------------------------------
47  *                                MODULES USED
48  *
49  *----------------------------------------------------------------------------
50  */
51
52 #include "AGESA.h"
53 #include "amdlib.h"
54 #include "OptionsHt.h"
55 #include "Ids.h"
56 #include "Topology.h"
57 #include "htFeat.h"
58 #include "htNb.h"
59 #include "CommonReturns.h"
60 #include "htNbCoherent.h"
61 #include "htNbCoherentFam10.h"
62 #include "htNbNonCoherent.h"
63 #include "htNbNonCoherentFam10.h"
64 #include "htNbOptimization.h"
65 #include "htNbOptimizationFam10.h"
66 #include "htNbSystemFam10.h"
67 #include "htNbUtilities.h"
68 #include "htNbUtilitiesFam10.h"
69 #include "cpuFamRegisters.h"
70 #include "Filecode.h"
71 CODE_GROUP (G1_PEICC)
72 RDATA_GROUP (G2_PEI)
73
74 #define FILECODE PROC_HT_FAM10_HTNBFAM10_FILECODE
75
76 extern OPTION_HT_CONFIGURATION OptionHtConfiguration;
77
78 /*----------------------------------------------------------------------------
79  *                          DEFINITIONS AND MACROS
80  *
81  *----------------------------------------------------------------------------
82  */
83
84 /*----------------------------------------------------------------------------
85  *                           TYPEDEFS AND STRUCTURES
86  *
87  *----------------------------------------------------------------------------
88  */
89 /*----------------------------------------------------------------------------
90  *                        PROTOTYPES OF LOCAL FUNCTIONS
91  *
92  *----------------------------------------------------------------------------
93  */
94
95 /***************************************************************************
96  ***               FAMILY/NORTHBRIDGE SPECIFIC FUNCTIONS                 ***
97  ***************************************************************************/
98
99 /**
100  * Map Northbridge links to package links for Family 10h, Rev D, multi-module.
101  *
102  * Unfortunately, there is no way to do this except to type the BKDG text into this data structure.
103  * Note that there is one entry per package external sublink and each connected internal link.
104  */
105 CONST PACKAGE_HTLINK_MAP_ITEM ROMDATA HtFam10RevDPackageLinkMap[] =
106 {
107   {0, 0, 0},        ///< Module zero, link 0: package link 0
108   {4, 0, 4},        ///< Module zero, link 4: package link 4
109   {0, 1, 1},        ///< Module one,  link 0: package link 1
110   {4, 1, 5},        ///< Module one,  link 4: package link 5
111   {3, 0, 2},        ///< Module zero, link 3: package link 2
112   {7, 0, 6},        ///< Module zero, link 7: package link 6
113   {2, 0, 3},        ///< Module zero, link 2: package link 3
114   {1, 1, 7},        ///< Module one,  link 1: package link 7
115   {1, 0, HT_LIST_MATCH_INTERNAL_LINK_0},        ///< Internal Link
116   {5, 0, HT_LIST_MATCH_INTERNAL_LINK_1},        ///< Internal Link
117   {6, 0, HT_LIST_MATCH_INTERNAL_LINK_2},        ///< Internal Link
118   {2, 1, HT_LIST_MATCH_INTERNAL_LINK_0},        ///< Internal Link
119   {6, 1, HT_LIST_MATCH_INTERNAL_LINK_1},        ///< Internal Link
120   {5, 1, HT_LIST_MATCH_INTERNAL_LINK_2},        ///< Internal Link
121   {HT_LIST_TERMINAL, HT_LIST_TERMINAL, HT_LIST_TERMINAL}, ///< End
122 };
123
124 /**
125  * A default Ignore Link list for rev D to power off the 3rd internal sublink.
126  */
127 STATIC CONST IGNORE_LINK ROMDATA Fam10RevDIgnoreLinkList[] = {
128   {HT_LIST_MATCH_ANY, HT_LIST_MATCH_INTERNAL_LINK_2, POWERED_OFF},
129   {HT_LIST_TERMINAL}
130 };
131
132 /**
133  * Initial construction data for Family 10h North Bridge, default, full features.
134  */
135 CONST NORTHBRIDGE ROMDATA HtFam10NbDefault =
136 {
137   8,
138   WriteRoutingTable,
139   WriteNodeID,
140   ReadDefaultLink,
141   EnableRoutingTables,
142   DisableRoutingTables,
143   VerifyLinkIsCoherent,
144   ReadToken,
145   WriteToken,
146   WriteFullRoutingTable,
147   IsIllegalTypeMix,
148   Fam10IsExceededCapable,
149   Fam10StopLink,
150   (PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
151   HandleSpecialNodeCase,
152   ReadSouthbridgeLink,
153   VerifyLinkIsNonCoherent,
154   Fam10SetConfigAddrMap,
155   Fam10NorthBridgeFreqMask,
156   GatherLinkFeatures,
157   SetLinkRegang,
158   SetLinkFrequency,
159   SetLinkUnitIdClumping,
160   Fam10WriteTrafficDistribution,
161   Fam10WriteLinkPairDistribution,
162   (PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
163   Fam10BufferOptimizations,
164   Fam10GetNumCoresOnNode,
165   SetTotalNodesAndCores,
166   GetNodeCount,
167   LimitNodes,
168   ReadTrueLinkFailStatus,
169   Fam10GetNextLink,
170   GetPackageLink,
171   MakeLinkBase,
172   Fam10GetModuleInfo,
173   Fam10PostMailbox,
174   Fam10RetrieveMailbox,
175   Fam10GetSocket,
176   (PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
177   (PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
178   0x00000001,
179   0x00000200,
180   18,
181   TRUE,
182   TRUE,
183   ((AMD_FAMILY_10) & ~(AMD_FAMILY_10_HY | AMD_FAMILY_10_PH)),
184   NULL,
185   0,
186   NULL,
187   MakeKey,
188   NULL
189 };
190
191 /**
192  * Initial construction data for Family 10h North Bridge, default, full features.
193  */
194 CONST NORTHBRIDGE ROMDATA HtFam10RevDNbDefault =
195 {
196   8,
197   WriteRoutingTable,
198   WriteNodeID,
199   ReadDefaultLink,
200   EnableRoutingTables,
201   DisableRoutingTables,
202   VerifyLinkIsCoherent,
203   ReadToken,
204   WriteToken,
205   WriteFullRoutingTable,
206   IsIllegalTypeMix,
207   Fam10IsExceededCapable,
208   Fam10StopLink,
209   (PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
210   HandleSpecialNodeCase,
211   ReadSouthbridgeLink,
212   VerifyLinkIsNonCoherent,
213   Fam10SetConfigAddrMap,
214   Fam10RevDNorthBridgeFreqMask,
215   GatherLinkFeatures,
216   SetLinkRegang,
217   SetLinkFrequency,
218   SetLinkUnitIdClumping,
219   Fam10WriteTrafficDistribution,
220   Fam10WriteLinkPairDistribution,
221   (PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
222   Fam10RevDBufferOptimizations,
223   Fam10RevDGetNumCoresOnNode,
224   SetTotalNodesAndCores,
225   GetNodeCount,
226   LimitNodes,
227   ReadTrueLinkFailStatus,
228   Fam10GetNextLink,
229   GetPackageLink,
230   MakeLinkBase,
231   Fam10GetModuleInfo,
232   Fam10PostMailbox,
233   Fam10RetrieveMailbox,
234   Fam10RevDGetSocket,
235   (PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
236   (PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
237   0x00000001,
238   0x00000200,
239   18,
240   TRUE,
241   TRUE,
242   (AMD_FAMILY_10_HY),
243   (PACKAGE_HTLINK_MAP) &HtFam10RevDPackageLinkMap,
244   0,
245   (IGNORE_LINK *)&Fam10RevDIgnoreLinkList,
246   MakeKey,
247   NULL
248 };
249
250 /**
251  * Initial construction data for Family 10h North Bridge, default, full features.
252  */
253 CONST NORTHBRIDGE ROMDATA HtFam10RevENbDefault =
254 {
255   8,
256   WriteRoutingTable,
257   WriteNodeID,
258   ReadDefaultLink,
259   EnableRoutingTables,
260   DisableRoutingTables,
261   VerifyLinkIsCoherent,
262   ReadToken,
263   WriteToken,
264   WriteFullRoutingTable,
265   IsIllegalTypeMix,
266   Fam10IsExceededCapable,
267   Fam10StopLink,
268   (PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
269   HandleSpecialNodeCase,
270   ReadSouthbridgeLink,
271   VerifyLinkIsNonCoherent,
272   Fam10SetConfigAddrMap,
273   Fam10NorthBridgeFreqMask,
274   GatherLinkFeatures,
275   SetLinkRegang,
276   SetLinkFrequency,
277   SetLinkUnitIdClumping,
278   Fam10WriteTrafficDistribution,
279   Fam10WriteLinkPairDistribution,
280   (PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
281   Fam10BufferOptimizations,
282   Fam10RevDGetNumCoresOnNode,
283   SetTotalNodesAndCores,
284   GetNodeCount,
285   LimitNodes,
286   ReadTrueLinkFailStatus,
287   Fam10GetNextLink,
288   GetPackageLink,
289   MakeLinkBase,
290   Fam10GetModuleInfo,
291   Fam10PostMailbox,
292   Fam10RetrieveMailbox,
293   Fam10GetSocket,
294   (PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
295   (PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
296   0x00000001,
297   0x00000200,
298   18,
299   TRUE,
300   TRUE,
301   (AMD_FAMILY_10_PH),
302   NULL,
303   0,
304   NULL,
305   MakeKey,
306   NULL
307 };
308
309 /**
310  * Initial construction data for Family 10h North Bridge, for non-coherent only builds.
311  */
312 CONST NORTHBRIDGE ROMDATA HtFam10NbNonCoherentOnly =
313 {
314   8,
315   (PF_WRITE_ROUTING_TABLE)CommonVoid,
316   (PF_WRITE_NODEID)CommonVoid,
317   (PF_READ_DEFAULT_LINK)CommonReturnZero8,
318   (PF_ENABLE_ROUTING_TABLES)CommonVoid,
319   (PF_DISABLE_ROUTING_TABLES)CommonVoid,
320   (PF_VERIFY_LINK_IS_COHERENT)CommonReturnFalse,
321   (PF_READ_TOKEN)CommonReturnZero8,
322   (PF_WRITE_TOKEN)CommonVoid,
323   (PF_WRITE_FULL_ROUTING_TABLE)CommonVoid,
324   (PF_IS_ILLEGAL_TYPE_MIX)CommonReturnFalse,
325   (PF_IS_EXCEEDED_CAPABLE)CommonReturnFalse,
326   (PF_STOP_LINK)CommonVoid,
327   (PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
328   (PF_HANDLE_SPECIAL_NODE_CASE)CommonReturnFalse,
329   ReadSouthbridgeLink,
330   VerifyLinkIsNonCoherent,
331   Fam10SetConfigAddrMap,
332   Fam10NorthBridgeFreqMask,
333   GatherLinkFeatures,
334   SetLinkRegang,
335   SetLinkFrequency,
336   SetLinkUnitIdClumping,
337   (PF_WRITE_TRAFFIC_DISTRIBUTION)CommonVoid,
338   (PF_WRITE_LINK_PAIR_DISTRIBUTION)CommonVoid,
339   (PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
340   Fam10BufferOptimizations,
341   Fam10GetNumCoresOnNode,
342   SetTotalNodesAndCores,
343   GetNodeCount,
344   LimitNodes,
345   ReadTrueLinkFailStatus,
346   Fam10GetNextLink,
347   GetPackageLink,
348   MakeLinkBase,
349   Fam10GetModuleInfo,
350   Fam10PostMailbox,
351   Fam10RetrieveMailbox,
352   Fam10GetSocket,
353   (PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
354   (PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
355   0x00000001,
356   0x00000200,
357   18,
358   TRUE,
359   TRUE,
360   ((AMD_FAMILY_10) & ~(AMD_FAMILY_10_HY | AMD_FAMILY_10_PH)),
361   NULL,
362   0,
363   NULL,
364   MakeKey,
365   NULL
366 };
367
368 /**
369  * Initial construction data for Family 10h North Bridge, for RevD compatible non-coherent only builds.
370  */
371 CONST NORTHBRIDGE ROMDATA HtFam10RevDNbNonCoherentOnly =
372 {
373   8,
374   (PF_WRITE_ROUTING_TABLE)CommonVoid,
375   (PF_WRITE_NODEID)CommonVoid,
376   (PF_READ_DEFAULT_LINK)CommonReturnZero8,
377   (PF_ENABLE_ROUTING_TABLES)CommonVoid,
378   (PF_DISABLE_ROUTING_TABLES)CommonVoid,
379   (PF_VERIFY_LINK_IS_COHERENT)CommonReturnFalse,
380   (PF_READ_TOKEN)CommonReturnZero8,
381   (PF_WRITE_TOKEN)CommonVoid,
382   (PF_WRITE_FULL_ROUTING_TABLE)CommonVoid,
383   (PF_IS_ILLEGAL_TYPE_MIX)CommonReturnFalse,
384   (PF_IS_EXCEEDED_CAPABLE)CommonReturnFalse,
385   (PF_STOP_LINK)CommonVoid,
386   (PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
387   (PF_HANDLE_SPECIAL_NODE_CASE)CommonReturnFalse,
388   ReadSouthbridgeLink,
389   VerifyLinkIsNonCoherent,
390   Fam10SetConfigAddrMap,
391   Fam10RevDNorthBridgeFreqMask,
392   GatherLinkFeatures,
393   SetLinkRegang,
394   SetLinkFrequency,
395   SetLinkUnitIdClumping,
396   (PF_WRITE_TRAFFIC_DISTRIBUTION)CommonVoid,
397   (PF_WRITE_LINK_PAIR_DISTRIBUTION)CommonVoid,
398   (PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
399   Fam10BufferOptimizations,
400   Fam10RevDGetNumCoresOnNode,
401   SetTotalNodesAndCores,
402   GetNodeCount,
403   LimitNodes,
404   ReadTrueLinkFailStatus,
405   Fam10GetNextLink,
406   GetPackageLink,
407   MakeLinkBase,
408   Fam10GetModuleInfo,
409   Fam10PostMailbox,
410   Fam10RetrieveMailbox,
411   Fam10GetSocket,
412   (PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
413   (PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
414   0x00000001,
415   0x00000200,
416   18,
417   TRUE,
418   TRUE,
419   (AMD_FAMILY_10_HY),
420   NULL,
421   0,
422   NULL,
423   MakeKey,
424   NULL
425 };
426
427 /**
428  * Initial construction data for Family 10h North Bridge, for RevE compatible non-coherent only builds.
429  */
430 CONST NORTHBRIDGE ROMDATA HtFam10RevENbNonCoherentOnly =
431 {
432   8,
433   (PF_WRITE_ROUTING_TABLE)CommonVoid,
434   (PF_WRITE_NODEID)CommonVoid,
435   (PF_READ_DEFAULT_LINK)CommonReturnZero8,
436   (PF_ENABLE_ROUTING_TABLES)CommonVoid,
437   (PF_DISABLE_ROUTING_TABLES)CommonVoid,
438   (PF_VERIFY_LINK_IS_COHERENT)CommonReturnFalse,
439   (PF_READ_TOKEN)CommonReturnZero8,
440   (PF_WRITE_TOKEN)CommonVoid,
441   (PF_WRITE_FULL_ROUTING_TABLE)CommonVoid,
442   (PF_IS_ILLEGAL_TYPE_MIX)CommonReturnFalse,
443   (PF_IS_EXCEEDED_CAPABLE)CommonReturnFalse,
444   (PF_STOP_LINK)CommonVoid,
445   (PF_HANDLE_SPECIAL_LINK_CASE)CommonReturnFalse,
446   (PF_HANDLE_SPECIAL_NODE_CASE)CommonReturnFalse,
447   ReadSouthbridgeLink,
448   VerifyLinkIsNonCoherent,
449   Fam10SetConfigAddrMap,
450   Fam10NorthBridgeFreqMask,
451   GatherLinkFeatures,
452   SetLinkRegang,
453   SetLinkFrequency,
454   SetLinkUnitIdClumping,
455   (PF_WRITE_TRAFFIC_DISTRIBUTION)CommonVoid,
456   (PF_WRITE_LINK_PAIR_DISTRIBUTION)CommonVoid,
457   (PF_WRITE_VICTIM_DISTRIBUTION)CommonVoid,
458   Fam10BufferOptimizations,
459   Fam10RevDGetNumCoresOnNode,
460   SetTotalNodesAndCores,
461   GetNodeCount,
462   LimitNodes,
463   ReadTrueLinkFailStatus,
464   Fam10GetNextLink,
465   GetPackageLink,
466   MakeLinkBase,
467   Fam10GetModuleInfo,
468   Fam10PostMailbox,
469   Fam10RetrieveMailbox,
470   Fam10GetSocket,
471   (PF_GET_ENABLED_COMPUTE_UNITS)CommonReturnZero8,
472   (PF_GET_DUALCORE_COMPUTE_UNITS)CommonReturnZero8,
473   0x00000001,
474   0x00000200,
475   18,
476   TRUE,
477   TRUE,
478   (AMD_FAMILY_10_PH),
479   NULL,
480   0,
481   NULL,
482   MakeKey,
483   NULL
484 };
485