5 * Coherent Family 10h Routines.
7 * Coherent feature Northbridge implementation specific to Family 10h processors.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: HyperTransport
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
16 *****************************************************************************
18 * Copyright (C) 2012 Advanced Micro Devices, Inc.
19 * All rights reserved.
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22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 * ***************************************************************************
48 *----------------------------------------------------------------------------
51 *----------------------------------------------------------------------------
62 #include "htNbCommonHardware.h"
63 #include "htNbCoherentFam10.h"
68 #define FILECODE PROC_HT_FAM10_HTNBCOHERENTFAM10_FILECODE
69 /*----------------------------------------------------------------------------
70 * DEFINITIONS AND MACROS
72 *----------------------------------------------------------------------------
75 /*----------------------------------------------------------------------------------------*/
77 * Return whether the current configuration exceeds the capability.
79 * @HtNbMethod{::F_IS_EXCEEDED_CAPABLE}.
81 * Get Node capability and update the minimum supported system capability.
83 * @param[in] Node the Node
84 * @param[in] State sysMpCap (updated) and NodesDiscovered
85 * @param[in] Nb this northbridge
87 * @retval TRUE system is not capable of current config.
88 * @retval FALSE system is capable of current config.
91 Fam10IsExceededCapable (
101 ASSERT (Node < MAX_NODES);
103 Reg.AddressValue = MAKE_SBDFO (MakePciSegmentFromNode (Node),
104 MakePciBusFromNode (Node),
105 MakePciDeviceFromNode (Node),
107 REG_NB_CAPABILITY_3XE8);
109 LibAmdPciReadBits (Reg, 18, 16, &Temp, Nb->ConfigHandle);
112 MaxNodes = (UINT8) (1 << (~Temp & 0x3)); // That is, 1, 2, 4, or 8
116 if (State->SysMpCap > MaxNodes) {
117 State->SysMpCap = MaxNodes;
119 // Note since sysMpCap is one based and NodesDiscovered is zero based, equal returns true
121 return ((BOOLEAN) (State->SysMpCap <= State->NodesDiscovered));
125 * Stop a link, so that it is isolated from a connected device.
127 * @HtNbMethod{::F_STOP_LINK}.
129 * Use is for fatal incompatible configurations, or for user interface
130 * request to power off a link (IgnoreLink, SkipRegang).
131 * Set ConnDly to make the power effective at the warm reset.
132 * Set XMT and RCV off.
134 * @param[in] Node the node to stop a link on.
135 * @param[in] Link the link to stop.
136 * @param[in] State access to special routine for writing link control register
137 * @param[in] Nb this northbridge.
143 IN STATE_DATA *State,
151 Reg.AddressValue = MAKE_SBDFO (MakePciSegmentFromNode (Node),
152 MakePciBusFromNode (Node),
153 MakePciDeviceFromNode (Node),
155 REG_LINK_GLOBAL_EXT_CONTROL_0x16C);
157 LibAmdPciWriteBits (Reg, 8, 8, &Temp, Nb->ConfigHandle);
158 // Set TransOff and EndOfChain
159 Reg = Nb->MakeLinkBase (Node, Link, Nb);
160 Reg.Address.Register += HTHOST_LINK_CONTROL_REG;
162 State->HtFeatures->SetHtControlRegisterBits (Reg, 7, 6, &Temp, State);