5 * AMD AGESA Basic Level Public APIs
7 * Contains basic Level Initialization routines.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: Interface
12 * @e \$Revision: 55552 $ @e \$Date: 2011-06-22 09:31:58 -0600 (Wed, 22 Jun 2011) $
15 /*****************************************************************************
17 * Copyright (C) 2012 Advanced Micro Devices, Inc.
18 * All rights reserved.
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
22 * * Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * * Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
28 * its contributors may be used to endorse or promote products derived
29 * from this software without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
42 ******************************************************************************
46 /*----------------------------------------------------------------------------------------
47 * M O D U L E S U S E D
48 *----------------------------------------------------------------------------------------
53 #include "OptionDmi.h"
54 #include "OptionSlit.h"
55 #include "cpuLateInit.h"
56 #include "cpuFeatures.h"
57 #include "CommonInits.h"
58 #include "GnbInterface.h"
59 #include "OptionPstate.h"
61 #include "heapManager.h"
62 #include "CreateStruct.h"
66 #define FILECODE PROC_COMMON_AMDINITLATE_FILECODE
67 /*----------------------------------------------------------------------------------------
68 * D E F I N I T I O N S A N D M A C R O S
69 *----------------------------------------------------------------------------------------
71 extern OPTION_DMI_CONFIGURATION OptionDmiConfiguration; // global user config record
72 extern OPTION_SLIT_CONFIGURATION OptionSlitConfiguration; // global user config record
73 extern OPTION_PSTATE_LATE_CONFIGURATION OptionPstateLateConfiguration;
75 /*----------------------------------------------------------------------------------------
76 * T Y P E D E F S A N D S T R U C T U R E S
77 *----------------------------------------------------------------------------------------
81 /*----------------------------------------------------------------------------------------
82 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
83 *----------------------------------------------------------------------------------------
86 AmdLatePlatformConfigInit (
87 IN OUT PLATFORM_CONFIGURATION *PlatformConfig,
88 IN OUT AMD_CONFIG_PARAMS *StdHeader
91 /*----------------------------------------------------------------------------------------
92 * E X P O R T E D F U N C T I O N S
93 *----------------------------------------------------------------------------------------
95 extern BUILD_OPT_CFG UserOptions;
97 /*------------------------------------------------------------------------------------*/
99 * Initialize AmdInitLate stage platform profile and user option input.
101 * @param[in,out] PlatformConfig Platform profile/build option config structure
102 * @param[in,out] StdHeader AMD standard header config param
104 * @retval AGESA_SUCCESS Always Succeeds.
108 AmdLatePlatformConfigInit (
109 IN OUT PLATFORM_CONFIGURATION *PlatformConfig,
110 IN OUT AMD_CONFIG_PARAMS *StdHeader
113 CommonPlatformConfigInit (PlatformConfig, StdHeader);
115 return AGESA_SUCCESS;
119 *---------------------------------------------------------------------------------------
121 * AmdInitLateInitializer
123 * Initializer routine that will be invoked by the wrapper
124 * to initialize the input structure for the AmdInitLate
126 * @param[in, out] IN OUT AMD_LATE_PARAMS *LateParamsPtr
128 * @retval AGESA_STATUS
130 *---------------------------------------------------------------------------------------
133 AmdInitLateInitializer (
134 IN AMD_CONFIG_PARAMS *StdHeader,
135 IN OUT AMD_LATE_PARAMS *LateParamsPtr
138 ASSERT (StdHeader != NULL);
139 ASSERT (LateParamsPtr != NULL);
141 LateParamsPtr->StdHeader = *StdHeader;
143 AmdLatePlatformConfigInit (&LateParamsPtr->PlatformConfig, &LateParamsPtr->StdHeader);
145 LateParamsPtr->AcpiSlit = NULL;
147 LateParamsPtr->AcpiSrat = NULL;
149 LateParamsPtr->AcpiWheaMce = NULL;
150 LateParamsPtr->AcpiWheaCmc = NULL;
152 LateParamsPtr->AcpiPState = NULL;
154 LateParamsPtr->DmiTable = NULL;
156 LateParamsPtr->AcpiAlib = NULL;
158 LateParamsPtr->IvrsExclusionRangeList = UserOptions.CfgIvrsExclusionRangeList;
160 return AGESA_SUCCESS;
164 *---------------------------------------------------------------------------------------
166 * AmdInitLateDestructor
168 * Destruct routine that provide a chance if something need to be done
169 * before the end of AmdInitLate.
171 * @param[in] StdHeader The standard header.
172 * @param[in] LateParamsPtr AMD init late param.
174 * @retval AGESA_STATUS
176 *---------------------------------------------------------------------------------------
179 AmdInitLateDestructor (
180 IN AMD_CONFIG_PARAMS *StdHeader,
181 IN AMD_LATE_PARAMS *LateParamsPtr
185 ASSERT (LateParamsPtr != NULL);
187 (*(OptionDmiConfiguration.DmiReleaseBuffer)) (StdHeader);
188 (*(OptionSlitConfiguration.SlitReleaseBuffer)) (StdHeader);
190 return AGESA_SUCCESS;
193 /*---------------------------------------------------------------------------------------*/
195 * Main entry point for the AMD_INIT_LATE function.
197 * This entry point is responsible for creating any desired ACPI tables, providing
198 * information for DMI, and to prepare the processors for the operating system
199 * bootstrap load process.
201 * @param[in,out] LateParams Required input parameters for the AMD_INIT_LATE
204 * @return Aggregated status across all internal AMD late calls invoked.
209 IN OUT AMD_LATE_PARAMS *LateParams
212 AGESA_STATUS AgesaStatus;
213 AGESA_STATUS AmdInitLateStatus;
214 IDS_HDT_CONSOLE (MAIN_FLOW, "AmdInitLate: Start\n\n");
215 AGESA_TESTPOINT (TpIfAmdInitLateEntry, &LateParams->StdHeader);
216 IDS_PERF_TIME_MEASURE (&LateParams->StdHeader);
218 ASSERT (LateParams != NULL);
219 AmdInitLateStatus = AGESA_SUCCESS;
221 IDS_OPTION_HOOK (IDS_INIT_LATE_BEFORE, LateParams, &LateParams->StdHeader);
223 IDS_HDT_CONSOLE (MAIN_FLOW, "CreatSystemTable: Start\n");
224 // _PSS, XPSS, _PCT, _PSD, _PPC, _CST, _CSD Tables
225 if ((LateParams->PlatformConfig.UserOptionPState) || (IsFeatureEnabled (IoCstate, &LateParams->PlatformConfig, &LateParams->StdHeader))) {
226 AgesaStatus = ((*(OptionPstateLateConfiguration.SsdtFeature)) (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiPState));
227 if (AgesaStatus > AmdInitLateStatus) {
228 AmdInitLateStatus = AgesaStatus;
232 // SRAT Table Generation
233 if (LateParams->PlatformConfig.UserOptionSrat) {
234 AgesaStatus = CreateAcpiSrat (&LateParams->StdHeader, &LateParams->AcpiSrat);
235 if (AgesaStatus > AmdInitLateStatus) {
236 AmdInitLateStatus = AgesaStatus;
240 // SLIT Table Generation
241 if (LateParams->PlatformConfig.UserOptionSlit) {
242 AgesaStatus = CreateAcpiSlit (&LateParams->StdHeader, &LateParams->PlatformConfig, &LateParams->AcpiSlit);
243 if (AgesaStatus > AmdInitLateStatus) {
244 AmdInitLateStatus = AgesaStatus;
248 // WHEA Table Generation
249 if (LateParams->PlatformConfig.UserOptionWhea) {
250 AgesaStatus = CreateAcpiWhea (&LateParams->StdHeader, &LateParams->AcpiWheaMce, &LateParams->AcpiWheaCmc);
251 if (AgesaStatus > AmdInitLateStatus) {
252 AmdInitLateStatus = AgesaStatus;
256 // DMI Table Generation
257 if (LateParams->PlatformConfig.UserOptionDmi) {
258 AgesaStatus = CreateDmiRecords (&LateParams->StdHeader, &LateParams->DmiTable);
259 if (AgesaStatus > AmdInitLateStatus) {
260 AmdInitLateStatus = AgesaStatus;
263 IDS_HDT_CONSOLE (MAIN_FLOW, "CreatSystemTable: End\n");
266 IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: LateStart\n");
267 AgesaStatus = DispatchCpuFeatures (CPU_FEAT_INIT_LATE_END, &LateParams->PlatformConfig, &LateParams->StdHeader);
268 IDS_HDT_CONSOLE (MAIN_FLOW, "DispatchCpuFeatures: LateEnd\n");
269 if (AgesaStatus > AmdInitLateStatus) {
270 AmdInitLateStatus = AgesaStatus;
273 // It is the last function run by the AGESA CPU module and prepares the processor
274 // for the operating system bootstrap load process.
275 IDS_HDT_CONSOLE (MAIN_FLOW, "AmdCpuLate: Start\n");
276 AgesaStatus = AmdCpuLate (&LateParams->StdHeader, &LateParams->PlatformConfig);
277 IDS_HDT_CONSOLE (MAIN_FLOW, "AmdCpuLate: End\n");
278 if (AgesaStatus > AmdInitLateStatus) {
279 AmdInitLateStatus = AgesaStatus;
282 AgesaStatus = GnbInitAtLate (LateParams);
283 if (AgesaStatus > AmdInitLateStatus) {
284 AmdInitLateStatus = AgesaStatus;
287 IDS_OPTION_HOOK (IDS_INIT_LATE_AFTER, LateParams, &LateParams->StdHeader);
288 IDS_PERF_TIME_MEASURE (&LateParams->StdHeader);
289 AGESA_TESTPOINT (TpIfAmdInitLateExit, &LateParams->StdHeader);
290 IDS_HDT_CONSOLE (MAIN_FLOW, "\nAmdInitLate: End\n\n");
291 AGESA_TESTPOINT (EndAgesaTps, &LateParams->StdHeader);
292 //End Debug Print Service
293 IDS_HDT_CONSOLE_EXIT (&LateParams->StdHeader);
294 return AmdInitLateStatus;