5 * AMD CPU Power Management Multisocket Functions.
7 * Contains code for doing power management for multisocket CPUs
9 * @xrefitem bom "File Content Label" "Release Content"
12 * @e \$Revision: 56322 $ @e \$Date: 2011-07-11 16:51:42 -0600 (Mon, 11 Jul 2011) $
16 ******************************************************************************
18 * Copyright (C) 2012 Advanced Micro Devices, Inc.
19 * All rights reserved.
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22 * modification, are permitted provided that the following conditions are met:
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43 ******************************************************************************
46 /*----------------------------------------------------------------------------------------
47 * M O D U L E S U S E D
48 *----------------------------------------------------------------------------------------
54 #include "cpuRegisters.h"
55 #include "GeneralServices.h"
56 #include "cpuServices.h"
57 #include "cpuApicUtilities.h"
58 #include "cpuFamilyTranslation.h"
59 #include "cpuPowerMgmtSystemTables.h"
60 #include "cpuPowerMgmtMultiSocket.h"
61 #include "GeneralServices.h"
66 #define FILECODE PROC_CPU_CPUPOWERMGMTMULTISOCKET_FILECODE
67 /*----------------------------------------------------------------------------------------
68 * D E F I N I T I O N S A N D M A C R O S
69 *----------------------------------------------------------------------------------------
72 /*----------------------------------------------------------------------------------------
73 * T Y P E D E F S A N D S T R U C T U R E S
74 *----------------------------------------------------------------------------------------
77 /*----------------------------------------------------------------------------------------
78 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
79 *----------------------------------------------------------------------------------------
84 IN OUT VOID *EventLogEntryPtr,
85 IN AMD_CONFIG_PARAMS *StdHeader
88 /*----------------------------------------------------------------------------------------
89 * E X P O R T E D F U N C T I O N S
90 *----------------------------------------------------------------------------------------
93 /*---------------------------------------------------------------------------------------*/
95 * Multisocket BSC call to start all system core 0s to perform a standard AP_TASK.
97 * This function loops through all possible socket locations, starting core 0 of
98 * each populated socket to perform the passed in AP_TASK. After starting all
99 * other core 0s, the BSC will perform the AP_TASK as well. This must be run by
100 * the system BSC only.
102 * @param[in] TaskPtr Function descriptor
103 * @param[in] StdHeader Config handle for library and services
104 * @param[in] ConfigParams AMD entry point's CPU parameter structure
108 RunCodeOnAllSystemCore0sMulti (
110 IN AMD_CONFIG_PARAMS *StdHeader,
111 IN VOID *ConfigParams
118 UINT32 NumberOfSockets;
119 AGESA_STATUS DummyStatus;
121 ASSERT (IsBsp (StdHeader, &DummyStatus));
123 NumberOfSockets = GetPlatformNumberOfSockets ();
125 IdentifyCore (StdHeader, &BscSocket, &BscModule, &BscCoreNum, &DummyStatus);
127 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
128 if (Socket != BscSocket) {
129 if (IsProcessorPresent (Socket, StdHeader)) {
130 ApUtilRunCodeOnSocketCore (Socket, 0, TaskPtr, StdHeader);
134 ApUtilTaskOnExecutingCore (TaskPtr, StdHeader, ConfigParams);
138 /*---------------------------------------------------------------------------------------*/
140 * Multisocket BSC call to determine the maximum number of steps that any single
141 * processor needs to execute.
143 * This function loops through all possible socket locations, gathering the number
144 * of power management steps each populated socket requires, and returns the
147 * @param[out] NumSystemSteps Maximum number of system steps required
148 * @param[in] StdHeader Config handle for library and services
152 GetNumberOfSystemPmStepsPtrMulti (
153 OUT UINT8 *NumSystemSteps,
154 IN AMD_CONFIG_PARAMS *StdHeader
158 UINT32 NumberOfSockets;
160 SYS_PM_TBL_STEP *Ignored;
161 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
163 NumberOfSockets = GetPlatformNumberOfSockets ();
166 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
167 if (IsProcessorPresent (Socket, StdHeader)) {
168 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
169 FamilySpecificServices->GetSysPmTableStruct (FamilySpecificServices, (CONST VOID **) &Ignored, &NumberOfSteps, StdHeader);
170 if (NumberOfSteps > *NumSystemSteps) {
171 *NumSystemSteps = NumberOfSteps;
178 /*---------------------------------------------------------------------------------------*/
180 * Multisocket call to determine the frequency that the northbridges must run.
182 * This function loops through all possible socket locations, comparing the
183 * maximum NB frequencies to determine the slowest. This function also
184 * determines if all coherent NB frequencies are equivalent.
186 * @param[in] NbPstate NB P-state number to check (0 = fastest)
187 * @param[in] PlatformConfig Platform profile/build option config structure.
188 * @param[out] SystemNbCofNumerator NB frequency numerator for the system in MHz
189 * @param[out] SystemNbCofDenominator NB frequency denominator for the system
190 * @param[out] SystemNbCofsMatch Whether or not all NB frequencies are equivalent
191 * @param[out] NbPstateIsEnabledOnAllCPUs Whether or not NbPstate is valid on all CPUs
192 * @param[in] StdHeader Config handle for library and services
194 * @retval TRUE At least one processor has NbPstate enabled.
195 * @retval FALSE NbPstate is disabled on all CPUs
199 GetSystemNbCofMulti (
201 IN PLATFORM_CONFIGURATION *PlatformConfig,
202 OUT UINT32 *SystemNbCofNumerator,
203 OUT UINT32 *SystemNbCofDenominator,
204 OUT BOOLEAN *SystemNbCofsMatch,
205 OUT BOOLEAN *NbPstateIsEnabledOnAllCPUs,
206 IN AMD_CONFIG_PARAMS *StdHeader
212 UINT32 CurrentDivisor;
216 BOOLEAN FirstCofNotFound;
217 BOOLEAN NbPstateDisabled;
218 BOOLEAN IsNbPstateEnabledOnAny;
220 AGESA_STATUS Ignored;
221 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
223 // Find the slowest NB COF in the system & whether or not all are equivalent
224 LowFrequency = 0xFFFFFFFF;
225 *SystemNbCofsMatch = TRUE;
226 *NbPstateIsEnabledOnAllCPUs = FALSE;
227 IsNbPstateEnabledOnAny = FALSE;
228 FirstCofNotFound = TRUE;
229 NbPstateDisabled = FALSE;
230 for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
231 if (IsProcessorPresent (Socket, StdHeader)) {
232 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
233 for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
234 if (GetPciAddress (StdHeader, Socket, Module, &PciAddress, &Ignored)) {
238 if (FamilySpecificServices->GetNbPstateInfo (FamilySpecificServices,
246 ASSERT (CurrentDivisor != 0);
247 CurrentFreq = (CurrentNbCof / CurrentDivisor);
248 if (FirstCofNotFound) {
249 *SystemNbCofNumerator = CurrentNbCof;
250 *SystemNbCofDenominator = CurrentDivisor;
251 LowFrequency = CurrentFreq;
252 IsNbPstateEnabledOnAny = TRUE;
253 if (!NbPstateDisabled) {
254 *NbPstateIsEnabledOnAllCPUs = TRUE;
256 FirstCofNotFound = FALSE;
258 if (CurrentFreq != LowFrequency) {
259 *SystemNbCofsMatch = FALSE;
260 if (CurrentFreq < LowFrequency) {
261 LowFrequency = CurrentFreq;
262 *SystemNbCofNumerator = CurrentNbCof;
263 *SystemNbCofDenominator = CurrentDivisor;
268 NbPstateDisabled = TRUE;
269 *NbPstateIsEnabledOnAllCPUs = FALSE;
273 return IsNbPstateEnabledOnAny;
277 /*---------------------------------------------------------------------------------------*/
279 * Multisocket call to determine if the BIOS is responsible for updating the
280 * northbridge operating frequency and voltage.
282 * This function loops through all possible socket locations, checking whether
283 * any populated sockets require NB COF VID programming.
285 * @param[in] StdHeader Config handle for library and services
287 * @retval TRUE BIOS needs to set up NB frequency and voltage
288 * @retval FALSE BIOS does not need to set up NB frequency and voltage
292 GetSystemNbCofVidUpdateMulti (
293 IN AMD_CONFIG_PARAMS *StdHeader
298 UINT32 NumberOfSockets;
300 BOOLEAN AtLeast1RequiresUpdate;
302 AGESA_STATUS Ignored;
303 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
305 NumberOfSockets = GetPlatformNumberOfSockets ();
307 AtLeast1RequiresUpdate = FALSE;
308 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
309 if (IsProcessorPresent (Socket, StdHeader)) {
310 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
311 for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
312 if (GetPciAddress (StdHeader, (UINT8) Socket, Module, &PciAddress, &Ignored)) {
316 if (FamilySpecificServices->IsNbCofInitNeeded (FamilySpecificServices, &PciAddress, &IgnoredBool, StdHeader)) {
317 AtLeast1RequiresUpdate = TRUE;
322 return AtLeast1RequiresUpdate;
326 /*---------------------------------------------------------------------------------------*/
328 * Multisocket call to determine the most severe AGESA_STATUS return value after
329 * processing the power management initialization tables.
331 * This function loops through all possible socket locations, collecting any
332 * power management initialization errors that may have occurred. These errors
333 * are transferred from the core 0s of the socket in which the errors occurred
334 * to the BSC's heap. The BSC's heap is then searched for the most severe error
335 * that occurred, and returns it. This function must be called by the BSC only.
337 * @param[in] StdHeader Config handle for library and services
339 * @return The most severe error code from power management init
343 GetEarlyPmErrorsMulti (
344 IN AMD_CONFIG_PARAMS *StdHeader
352 UINT32 NumberOfSockets;
354 AGESA_EVENT EventLogEntry;
355 AGESA_STATUS ReturnCode;
356 AGESA_STATUS DummyStatus;
358 ASSERT (IsBsp (StdHeader, &ReturnCode));
360 ReturnCode = AGESA_SUCCESS;
361 EventLogEntry.EventClass = AGESA_SUCCESS;
362 EventLogEntry.EventInfo = 0;
363 EventLogEntry.DataParam1 = 0;
364 EventLogEntry.DataParam2 = 0;
365 EventLogEntry.DataParam3 = 0;
366 EventLogEntry.DataParam4 = 0;
368 NumberOfSockets = GetPlatformNumberOfSockets ();
369 IdentifyCore (StdHeader, &BscSocket, &BscModule, &BscCoreNum, &DummyStatus);
371 TaskPtr.FuncAddress.PfApTaskI = GetNextEvent;
372 TaskPtr.DataTransfer.DataSizeInDwords = SIZE_IN_DWORDS (AGESA_EVENT);
373 TaskPtr.DataTransfer.DataPtr = &EventLogEntry;
374 TaskPtr.DataTransfer.DataTransferFlags = 0;
375 TaskPtr.ExeFlags = WAIT_FOR_CORE | RETURN_PARAMS;
376 for (Socket = 0; Socket < NumberOfSockets; Socket++) {
377 if (Socket != BscSocket) {
378 if (IsProcessorPresent (Socket, StdHeader)) {
380 ApUtilRunCodeOnSocketCore ((UINT8)Socket, (UINT8) 0, &TaskPtr, StdHeader);
381 if ((EventLogEntry.EventInfo & CPU_EVENT_PM_EVENT_MASK) == CPU_EVENT_PM_EVENT_CLASS) {
383 EventLogEntry.EventClass,
384 EventLogEntry.EventInfo,
385 EventLogEntry.DataParam1,
386 EventLogEntry.DataParam2,
387 EventLogEntry.DataParam3,
388 EventLogEntry.DataParam4,
392 } while (EventLogEntry.EventInfo != 0);
397 for (i = 0; PeekEventLog (&EventLogEntry, i, StdHeader); i++) {
398 if ((EventLogEntry.EventInfo & CPU_EVENT_PM_EVENT_MASK) == CPU_EVENT_PM_EVENT_CLASS) {
399 if (EventLogEntry.EventClass > ReturnCode) {
400 ReturnCode = EventLogEntry.EventClass;
408 * Multisocket call to loop through all possible socket locations and Nb Pstates,
409 * comparing the NB frequencies to determine the slowest system and P0 frequency
411 * @param[in] PlatformConfig Platform profile/build option config structure.
412 * @param[out] MinSysNbFreq NB frequency numerator for the system in MHz
413 * @param[out] MinP0NbFreq NB frequency numerator for P0 in MHz
414 * @param[in] StdHeader Config handle for library and services
418 IN PLATFORM_CONFIGURATION *PlatformConfig,
419 OUT UINT32 *MinSysNbFreq,
420 OUT UINT32 *MinP0NbFreq,
421 IN AMD_CONFIG_PARAMS *StdHeader
429 AGESA_STATUS Ignored;
430 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
432 *MinSysNbFreq = 0xFFFFFFFF;
433 *MinP0NbFreq = 0xFFFFFFFF;
435 for (Socket = 0; Socket < GetPlatformNumberOfSockets (); Socket++) {
436 if (IsProcessorPresent (Socket, StdHeader)) {
437 GetCpuServicesOfSocket (Socket, (const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
438 for (Module = 0; Module < GetPlatformNumberOfModules (); Module++) {
439 if (GetPciAddress (StdHeader, Socket, Module, &PciAddress, &Ignored )) {
445 FamilySpecificServices->GetMinMaxNbFrequency (FamilySpecificServices,
451 // Determine the slowest NB Pmin frequency
452 if (CurrMinFreq < *MinSysNbFreq) {
453 *MinSysNbFreq = CurrMinFreq;
456 // Determine the slowest NB P0 frequency
457 if (CurrMaxFreq < *MinP0NbFreq) {
458 *MinP0NbFreq = CurrMaxFreq;
464 /*---------------------------------------------------------------------------------------*/
466 * Get PCI Config Space Address for the current running core.
468 * @param[out] PciAddress The Processor's PCI Config Space address (Function 0, Register 0)
469 * @param[in] StdHeader Header for library and services.
471 * @retval TRUE The core is present, PCI Address valid
472 * @retval FALSE The core is not present, PCI Address not valid.
475 GetCurrPciAddrMulti (
476 OUT PCI_ADDR *PciAddress,
477 IN AMD_CONFIG_PARAMS *StdHeader
485 AGESA_STATUS IgnoredSts;
489 IdentifyCore (StdHeader, &Socket, &Module, &Core, &IgnoredSts);
491 ASSERT (Socket < MAX_SOCKETS);
492 ASSERT (Module < MAX_DIES);
494 if (GetNodeId (Socket, Module, &Node, StdHeader)) {
495 // Socket is populated
496 PciAddress->AddressValue = MAKE_SBDFO (0, 0, 24, 0, 0);
497 PciAddress->Address.Device = PciAddress->Address.Device + Node;
499 // Socket is not populated
500 PciAddress->AddressValue = ILLEGAL_SBDFO;
507 /*---------------------------------------------------------------------------------------*/
509 * Writes to all nodes on the executing core's socket.
511 * @param[in] PciAddress The Function and Register to update
512 * @param[in] Mask The bitwise AND mask to apply to the current register value
513 * @param[in] Data The bitwise OR mask to apply to the current register value
514 * @param[in] StdHeader Header for library and services.
518 ModifyCurrSocketPciMulti (
519 IN PCI_ADDR *PciAddress,
522 IN AMD_CONFIG_PARAMS *StdHeader
528 UINT32 LocalPciRegister;
529 AGESA_STATUS AgesaStatus;
532 IdentifyCore (StdHeader, &Socket, &Module, &Core, &AgesaStatus);
534 for (Module = 0; Module < (UINT8)GetPlatformNumberOfModules (); Module++) {
535 if (GetPciAddress (StdHeader, Socket, Module, &Reg, &AgesaStatus)) {
536 Reg.Address.Function = PciAddress->Address.Function;
537 Reg.Address.Register = PciAddress->Address.Register;
538 LibAmdPciRead (AccessWidth32, Reg, &LocalPciRegister, StdHeader);
539 LocalPciRegister &= Mask;
540 LocalPciRegister |= Data;
541 LibAmdPciWrite (AccessWidth32, Reg, &LocalPciRegister, StdHeader);
546 /*---------------------------------------------------------------------------------------
547 * L O C A L F U N C T I O N S
548 *---------------------------------------------------------------------------------------
551 /*---------------------------------------------------------------------------------------*/
553 * AP task to return the next event log entry to the BSC.
555 * This function calls to the event log manager to retrieve the next error out
558 * @param[out] EventLogEntryPtr The AP's next event log entry
559 * @param[in] StdHeader Config handle for library and services
565 IN OUT VOID *EventLogEntryPtr,
566 IN AMD_CONFIG_PARAMS *StdHeader
569 GetEventLog ((AGESA_EVENT *) EventLogEntryPtr, StdHeader);