5 * AMD CPU Power Management functions.
7 * Contains code for doing early power management
9 * @xrefitem bom "File Content Label" "Release Content"
12 * @e \$Revision: 56322 $ @e \$Date: 2011-07-11 16:51:42 -0600 (Mon, 11 Jul 2011) $
16 ****************************************************************************
18 * Copyright (C) 2012 Advanced Micro Devices, Inc.
19 * All rights reserved.
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ******************************************************************************
46 /*----------------------------------------------------------------------------------------
47 * M O D U L E S U S E D
48 *----------------------------------------------------------------------------------------
53 #include "cpuRegisters.h"
54 #include "cpuFamilyTranslation.h"
55 #include "OptionMultiSocket.h"
56 #include "cpuApicUtilities.h"
57 #include "cpuEarlyInit.h"
58 #include "cpuPowerMgmtSystemTables.h"
59 #include "cpuServices.h"
64 #define FILECODE PROC_CPU_CPUPOWERMGMT_FILECODE
65 /*----------------------------------------------------------------------------------------
66 * D E F I N I T I O N S A N D M A C R O S
67 *----------------------------------------------------------------------------------------
70 /*----------------------------------------------------------------------------------------
71 * T Y P E D E F S A N D S T R U C T U R E S
72 *----------------------------------------------------------------------------------------
75 /*----------------------------------------------------------------------------------------
76 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
77 *----------------------------------------------------------------------------------------
83 IN AMD_CONFIG_PARAMS *StdHeader,
84 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
89 GoToMemInitPstateCore0 (
90 IN AMD_CONFIG_PARAMS *StdHeader,
91 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
96 GoToMemInitPstateCore (
97 IN AMD_CONFIG_PARAMS *StdHeader,
98 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
101 /*----------------------------------------------------------------------------------------
102 * E X P O R T E D F U N C T I O N S
103 *----------------------------------------------------------------------------------------
105 extern OPTION_MULTISOCKET_CONFIGURATION OptionMultiSocketConfiguration;
107 /*---------------------------------------------------------------------------------------*/
109 * Perform the "BIOS Requirements for P-State Initialization and Transitions."
111 * This is the generic arbiter code to be executed by the BSC. The system power
112 * management init tables will be traversed. This must be run by the system BSC
115 * @param[in] CpuEarlyParams Required input parameters for early CPU initialization
116 * @param[in] StdHeader Config handle for library and services
118 * @return Most severe AGESA_STATUS level that any system processor encountered
122 PmInitializationAtEarly (
123 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParams,
124 IN AMD_CONFIG_PARAMS *StdHeader
128 UINT8 NumberOfSystemWideSteps;
130 AGESA_STATUS ReturnCode;
131 WARM_RESET_REQUEST Request;
133 // Determine the number of steps to perform
134 OptionMultiSocketConfiguration.GetNumberOfSystemPmSteps (&NumberOfSystemWideSteps, StdHeader);
136 // Traverse the PM init table
137 TaskPtr.FuncAddress.PfApTaskIC = PerformThisPmStep;
138 TaskPtr.DataTransfer.DataSizeInDwords = 1;
139 TaskPtr.DataTransfer.DataPtr = &i;
140 TaskPtr.DataTransfer.DataTransferFlags = 0;
141 TaskPtr.ExeFlags = PASS_EARLY_PARAMS;
142 for (i = 0; i < NumberOfSystemWideSteps; ++i) {
143 IDS_HDT_CONSOLE (CPU_TRACE, " Perform PM init step %d\n", i);
144 OptionMultiSocketConfiguration.BscRunCodeOnAllSystemCore0s (&TaskPtr, StdHeader, CpuEarlyParams);
147 // GoToMemInitPstateCore0 only if there is no pending warm reset.
148 GetWarmResetFlag (StdHeader, &Request);
149 if (Request.RequestBit == FALSE) {
150 TaskPtr.FuncAddress.PfApTaskC = GoToMemInitPstateCore0;
151 TaskPtr.DataTransfer.DataSizeInDwords = 0;
152 TaskPtr.ExeFlags = PASS_EARLY_PARAMS;
153 IDS_HDT_CONSOLE (CPU_TRACE, " Transition all cores to POST P-state\n");
154 OptionMultiSocketConfiguration.BscRunCodeOnAllSystemCore0s (&TaskPtr, StdHeader, CpuEarlyParams);
157 // Retrieve/Process any errors
158 ReturnCode = OptionMultiSocketConfiguration.BscRetrievePmEarlyInitErrors (StdHeader);
164 /*---------------------------------------------------------------------------------------*/
166 * Performs the next step in the executing core 0's family specific power
169 * This function determines if the input step is valid, and invokes the power
170 * management step if appropriate. This must be run by processor core 0s only.
172 * @param[in] Step Zero based step number
173 * @param[in] StdHeader Config handle for library and services
174 * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization
181 IN AMD_CONFIG_PARAMS *StdHeader,
182 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
185 UINT8 MyNumberOfSteps;
186 SYS_PM_TBL_STEP *FamilyTablePtr;
187 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
189 GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
190 FamilySpecificServices->GetSysPmTableStruct (FamilySpecificServices, (CONST VOID **) &FamilyTablePtr, &MyNumberOfSteps, StdHeader);
192 if (*(UINT8 *)Step < MyNumberOfSteps) {
193 if (FamilyTablePtr[*(UINT8 *)Step].FuncPtr != NULL) {
194 if (!(BOOLEAN) (FamilyTablePtr[*(UINT8 *)Step].ExeFlags & PM_EXEFLAGS_WARM_ONLY) ||
195 IsWarmReset (StdHeader)) {
196 FamilyTablePtr[*(UINT8 *)Step].FuncPtr (FamilySpecificServices, CpuEarlyParamsPtr, StdHeader);
203 /*---------------------------------------------------------------------------------------*/
205 * Transitions the executing processor to the desired P-state.
207 * This function implements the AMD_CPU_EARLY_PARAMS.MemInitPState parameter, and is
208 * run by all processor core 0s.
210 * @param[in] StdHeader Config handle for library and services
211 * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization
216 GoToMemInitPstateCore0 (
217 IN AMD_CONFIG_PARAMS *StdHeader,
218 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
223 TaskPtr.FuncAddress.PfApTaskC = GoToMemInitPstateCore;
224 TaskPtr.DataTransfer.DataSizeInDwords = 0;
225 TaskPtr.ExeFlags = WAIT_FOR_CORE | PASS_EARLY_PARAMS;
226 ApUtilRunCodeOnAllLocalCoresAtEarly (&TaskPtr, StdHeader, CpuEarlyParamsPtr);
230 /*---------------------------------------------------------------------------------------*/
232 * Transitions the executing core to the desired P-state.
234 * This function implements the AMD_CPU_EARLY_PARAMS.MemInitPState parameter, and is
235 * run by all system cores.
237 * @param[in] StdHeader Config handle for library and services
238 * @param[in] CpuEarlyParamsPtr Required input parameters for early CPU initialization
243 GoToMemInitPstateCore (
244 IN AMD_CONFIG_PARAMS *StdHeader,
245 IN AMD_CPU_EARLY_PARAMS *CpuEarlyParamsPtr
248 CPU_SPECIFIC_SERVICES *FamilySpecificServices;
250 GetCpuServicesOfCurrentCore ((CONST CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, StdHeader);
251 FamilySpecificServices->TransitionPstate (FamilySpecificServices, CpuEarlyParamsPtr->MemInitPState, (BOOLEAN) FALSE, StdHeader);