src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevE/F10RevEHtPhyTables.c

   1 /* $NoKeywords:$ */
   2 /**
   3  * @file
   4  *
   5  * AMD Family_10 Rev E HT PCI tables with values as defined in BKDG
   6  *
   7  * @xrefitem bom "File Content Label" "Release Content"
   8  * @e project:      AGESA
   9  * @e sub-project:  CPU/FAMILY/0x10
  10  * @e \$Revision: 56279 $   @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
  11  *
  12  */
  13 /*
  14  ******************************************************************************
  15  *
  16  * Copyright (C) 2012 Advanced Micro Devices, Inc.
  17  * All rights reserved.
  18  *
  19  * Redistribution and use in source and binary forms, with or without
  20  * modification, are permitted provided that the following conditions are met:
  21  *     * Redistributions of source code must retain the above copyright
  22  *       notice, this list of conditions and the following disclaimer.
  23  *     * Redistributions in binary form must reproduce the above copyright
  24  *       notice, this list of conditions and the following disclaimer in the
  25  *       documentation and/or other materials provided with the distribution.
  26  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
  27  *       its contributors may be used to endorse or promote products derived
  28  *       from this software without specific prior written permission.
  29  *
  30  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
  34  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  35  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  37  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  39  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  ******************************************************************************
  42  */
  43
  44 /*----------------------------------------------------------------------------------------
  45  *                             M O D U L E S    U S E D
  46  *----------------------------------------------------------------------------------------
  47  */
  48 #include "AGESA.h"
  49 #include "cpuRegisters.h"
  50 #include "Table.h"
  51 #include "Filecode.h"
  52 CODE_GROUP (G1_PEICC)
  53 RDATA_GROUP (G2_PEI)
  54
  55 #define FILECODE PROC_CPU_FAMILY_0X10_REVE_F10REVEHTPHYTABLES_FILECODE
  56
  57 /*----------------------------------------------------------------------------------------
  58  *                   D E F I N I T I O N S    A N D    M A C R O S
  59  *----------------------------------------------------------------------------------------
  60  */
  61
  62 /*----------------------------------------------------------------------------------------
  63  *                  T Y P E D E F S     A N D     S T R U C T U R E S
  64  *----------------------------------------------------------------------------------------
  65  */
  66
  67 /*----------------------------------------------------------------------------------------
  68  *           P R O T O T Y P E S     O F     L O C A L     F U N C T I O N S
  69  *----------------------------------------------------------------------------------------
  70  */
  71
  72 /*----------------------------------------------------------------------------------------
  73  *                          E X P O R T E D    F U N C T I O N S
  74  *----------------------------------------------------------------------------------------
  75  */
  76
  77 //  HT   Phy T a b l e s
  78 // -------------------------
  79 STATIC CONST TABLE_ENTRY_FIELDS ROMDATA F10RevEHtPhyRegisters[] =
  80 {
  81 // 0x60:0x68
  82   {
  83     HtPhyRangeRegister,
  84     {
  85       AMD_FAMILY_10,                      // CpuFamily
  86       AMD_F10_Ex                          // CpuRevision
  87     },
  88     {AMD_PF_ALL},                           // platformFeatures
  89     {{
  90       HTPHY_LINKTYPE_SL0_ALL,               //
  91       0x60, 0x68,                           // Address range
  92       0x00000040,                           // regData
  93       0x00000040,                           // regMask
  94     }}
  95   },
  96 // 0x70:0x78
  97   {
  98     HtPhyRangeRegister,
  99     {
 100       AMD_FAMILY_10,                      // CpuFamily
 101       AMD_F10_Ex                          // CpuRevision
 102     },
 103     {AMD_PF_ALL},                           // platformFeatures
 104     {{
 105       HTPHY_LINKTYPE_SL1_ALL,               //
 106       0x70, 0x78,                           // Address range
 107       0x00000040,                           // regData
 108       0x00000040,                           // regMask
 109     }}
 110   },
 111 // 0xC0
 112   {
 113     HtPhyRegister,
 114     {
 115       AMD_FAMILY_10,                      // CpuFamily
 116       AMD_F10_Ex                          // CpuRevision
 117     },
 118     {AMD_PF_ALL},                           // platformFeatures
 119     {{
 120       HTPHY_LINKTYPE_SL0_ALL,               //
 121       0xC0,                                 // Address
 122       0x40040000,                           // regData
 123       0xe01F0000,                           // regMask
 124     }}
 125   },
 126 // 0xD0
 127   {
 128     HtPhyRegister,
 129     {
 130       AMD_FAMILY_10,                      // CpuFamily
 131       AMD_F10_Ex                          // CpuRevision
 132     },
 133     {AMD_PF_ALL},                           // platformFeatures
 134     {{
 135       HTPHY_LINKTYPE_SL1_ALL,               //
 136       0xD0,                                 // Address
 137       0x40040000,                           // regData
 138       0xe01F0000,                           // regMask
 139     }}
 140   },
 141 // 0x520A
 142   {
 143     HtPhyRegister,
 144     {
 145       AMD_FAMILY_10,                      // CpuFamily
 146       AMD_F10_Ex                           // CpuRevision
 147     },
 148     {AMD_PF_ALL},                           // platformFeatures
 149     {{
 150       HTPHY_LINKTYPE_SL0_ALL,                   //
 151       0x520A,                               // Address
 152       0x00004000,                           // regData
 153       0x00006000,                           // regMask
 154     }}
 155   },
 156 // 0x530A
 157   {
 158     HtPhyRegister,
 159     {
 160       AMD_FAMILY_10,                      // CpuFamily
 161       AMD_F10_Ex                           // CpuRevision
 162     },
 163     {AMD_PF_ALL},                           // platformFeatures
 164     {{
 165       HTPHY_LINKTYPE_SL1_ALL,                   //
 166       0x530A,                               // Address
 167       0x00004000,                           // regData
 168       0x00006000,                           // regMask
 169     }}
 170   },
 171
 172
 173 //
 174 // Deemphasis Settings
 175 //
 176
 177 // For C3, also set [7]TxLs23ClkGateEn.
 178 //deemphasis level        DL1[20:16], DL2[12:8], DP1[4:0] PostCur1En[31] PostCur2En[30] PreCur1En[29] MapPostCur2En[6]
 179 // No deemphasis            00h        00h          00h     0                0             0             0
 180 // -3dB postcursor          12h        00h          00h     1                0             0             0
 181 // -6dB postcursor          1Fh        00h          00h     1                0             0             0
 182 // -8dB postcursor          1Fh        06h          00h     1                1             0             1
 183 // -11dB postcursor         1Fh        0Dh          00h     1                1             0             1
 184 // -11dB postcursor with
 185 // -8dB precursor           1Fh        06h          07h     1                1             1             1
 186
 187   {
 188     DeemphasisRegister,
 189     {
 190       AMD_FAMILY_10,                      // CpuFamily
 191       AMD_F10_Ex                               // CpuRevision
 192     },
 193     {AMD_PF_ALL},                           // platformFeatures
 194     {{
 195       DEEMPHASIS_LEVEL_NONE,
 196       HTPHY_LINKTYPE_SL0_HT3,               //
 197       0xC5,                                 // Address
 198       0x00000080,                           // regData
 199       0xE01F1FDF,                           // regMask
 200     }}
 201   },
 202   {
 203     DeemphasisRegister,
 204     {
 205       AMD_FAMILY_10,                      // CpuFamily
 206       AMD_F10_Ex                               // CpuRevision
 207     },
 208     {AMD_PF_ALL},                           // platformFeatures
 209     {{
 210       DEEMPHASIS_LEVEL_NONE,
 211       HTPHY_LINKTYPE_SL1_HT3,               //
 212       0xD5,                                 // Address
 213       0x00000080,                           // regData
 214       0xE01F1FDF,                           // regMask
 215     }}
 216   },
 217   {
 218     DeemphasisRegister,
 219     {
 220       AMD_FAMILY_10,                      // CpuFamily
 221       AMD_F10_Ex                               // CpuRevision
 222     },
 223     {AMD_PF_ALL},                           // platformFeatures
 224     {{
 225       DEEMPHASIS_LEVEL__3,
 226       HTPHY_LINKTYPE_SL0_HT3,               //
 227       0xC5,                                 // Address
 228       0x80120080,                           // regData
 229       0xE01F1FDF,                           // regMask
 230     }}
 231   },
 232   {
 233     DeemphasisRegister,
 234     {
 235       AMD_FAMILY_10,                      // CpuFamily
 236       AMD_F10_Ex                               // CpuRevision
 237     },
 238     {AMD_PF_ALL},                           // platformFeatures
 239     {{
 240       DEEMPHASIS_LEVEL__3,
 241       HTPHY_LINKTYPE_SL1_HT3,               //
 242       0xD5,                                 // Address
 243       0x80120080,                           // regData
 244       0xE01F1FDF,                           // regMask
 245     }}
 246   },
 247   {
 248     DeemphasisRegister,
 249     {
 250       AMD_FAMILY_10,                      // CpuFamily
 251       AMD_F10_Ex                               // CpuRevision
 252     },
 253     {AMD_PF_ALL},                           // platformFeatures
 254     {{
 255       DEEMPHASIS_LEVEL__6,
 256       HTPHY_LINKTYPE_SL0_HT3,               //
 257       0xC5,                                 // Address
 258       0x801F0080,                           // regData
 259       0xE01F1FDF,                           // regMask
 260     }}
 261   },
 262   {
 263     DeemphasisRegister,
 264     {
 265       AMD_FAMILY_10,                      // CpuFamily
 266       AMD_F10_Ex                               // CpuRevision
 267     },
 268     {AMD_PF_ALL},                           // platformFeatures
 269     {{
 270       DEEMPHASIS_LEVEL__6,
 271       HTPHY_LINKTYPE_SL1_HT3,               //
 272       0xD5,                                 // Address
 273       0x801F0080,                           // regData
 274       0xE01F1FDF,                           // regMask
 275     }}
 276   },
 277   {
 278     DeemphasisRegister,
 279     {
 280       AMD_FAMILY_10,                      // CpuFamily
 281       AMD_F10_Ex                               // CpuRevision
 282     },
 283     {AMD_PF_ALL},                           // platformFeatures
 284     {{
 285       DEEMPHASIS_LEVEL__8,
 286       HTPHY_LINKTYPE_SL0_HT3,               //
 287       0xC5,                                 // Address
 288       0xC01F06C0,                           // regData
 289       0xE01F1FDF,                           // regMask
 290     }}
 291   },
 292   {
 293     DeemphasisRegister,
 294     {
 295       AMD_FAMILY_10,                      // CpuFamily
 296       AMD_F10_Ex                               // CpuRevision
 297     },
 298     {AMD_PF_ALL},                           // platformFeatures
 299     {{
 300       DEEMPHASIS_LEVEL__8,
 301       HTPHY_LINKTYPE_SL1_HT3,               //
 302       0xD5,                                 // Address
 303       0xC01F06C0,                           // regData
 304       0xE01F1FDF,                           // regMask
 305     }}
 306   },
 307   {
 308     DeemphasisRegister,
 309     {
 310       AMD_FAMILY_10,                      // CpuFamily
 311       AMD_F10_Ex                               // CpuRevision
 312     },
 313     {AMD_PF_ALL},                           // platformFeatures
 314     {{
 315       DEEMPHASIS_LEVEL__11,
 316       HTPHY_LINKTYPE_SL0_HT3,               //
 317       0xC5,                                 // Address
 318       0xC01F0DC0,                           // regData
 319       0xE01F1FDF,                           // regMask
 320     }}
 321   },
 322   {
 323     DeemphasisRegister,
 324     {
 325       AMD_FAMILY_10,                      // CpuFamily
 326       AMD_F10_Ex                               // CpuRevision
 327     },
 328     {AMD_PF_ALL},                           // platformFeatures
 329     {{
 330       DEEMPHASIS_LEVEL__11,
 331       HTPHY_LINKTYPE_SL1_HT3,               //
 332       0xD5,                                 // Address
 333       0xC01F0DC0,                           // regData
 334       0xE01F1FDF,                           // regMask
 335     }}
 336   },
 337   {
 338     DeemphasisRegister,
 339     {
 340       AMD_FAMILY_10,                      // CpuFamily
 341       AMD_F10_Ex                               // CpuRevision
 342     },
 343     {AMD_PF_ALL},                           // platformFeatures
 344     {{
 345       DEEMPHASIS_LEVEL__11_8,
 346       HTPHY_LINKTYPE_SL0_HT3,               //
 347       0xC5,                                 // Address
 348       0xE01F06C7,                           // regData
 349       0xE01F1FDF,                           // regMask
 350     }}
 351   },
 352   {
 353     DeemphasisRegister,
 354     {
 355       AMD_FAMILY_10,                      // CpuFamily
 356       AMD_F10_Ex                               // CpuRevision
 357     },
 358     {AMD_PF_ALL},                           // platformFeatures
 359     {{
 360       DEEMPHASIS_LEVEL__11_8,
 361       HTPHY_LINKTYPE_SL1_HT3,               //
 362       0xD5,                                 // Address
 363       0xE01F06C7,                           // regData
 364       0xE01F1FDF,                           // regMask
 365     }}
 366   },
 367 };
 368
 369 CONST REGISTER_TABLE ROMDATA F10RevEHtPhyRegisterTable = {
 370   PrimaryCores,
 371   (sizeof (F10RevEHtPhyRegisters) / sizeof (TABLE_ENTRY_FIELDS)),
 372   F10RevEHtPhyRegisters
 373 };