5 * AMD Family_10 HY MSR tables with values as defined in BKDG
7 * @xrefitem bom "File Content Label" "Release Content"
10 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
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41 ******************************************************************************
44 /*----------------------------------------------------------------------------------------
45 * M O D U L E S U S E D
46 *----------------------------------------------------------------------------------------
49 #include "cpuRegisters.h"
55 #define FILECODE PROC_CPU_FAMILY_0X10_REVD_HY_F10HYMSRTABLES_FILECODE
57 /*----------------------------------------------------------------------------------------
58 * D E F I N I T I O N S A N D M A C R O S
59 *----------------------------------------------------------------------------------------
62 /*----------------------------------------------------------------------------------------
63 * T Y P E D E F S A N D S T R U C T U R E S
64 *----------------------------------------------------------------------------------------
67 /*----------------------------------------------------------------------------------------
68 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
69 *----------------------------------------------------------------------------------------
72 /*----------------------------------------------------------------------------------------
73 * E X P O R T E D F U N C T I O N S
74 *----------------------------------------------------------------------------------------
76 STATIC CONST MSR_TYPE_ENTRY_INITIALIZER ROMDATA F10HyMsrRegisters[] =
79 // ----------------------
81 // MSR_LS_CFG (0xC0011020)
86 AMD_FAMILY_10, // CpuFamily
87 AMD_F10_GT_B0 // CpuRevision
89 {AMD_PF_ALL}, // platformFeatures
91 MSR_LS_CFG, // MSR Address
92 0x0000000000000000, // OR Mask
97 // MSR_BU_CFG (0xC0011023)
102 AMD_FAMILY_10, // CpuFamily
103 AMD_F10_GT_B0 // CpuRevision
105 {AMD_PF_ALL}, // platformFeatures
107 MSR_BU_CFG, // MSR Address
108 (1 << 21), // OR Mask
109 (1 << 21), // NAND Mask
113 // MSR_BU_CFG2 (0xC001102A)
115 // For GH rev C1 and later [RdMmExtCfgQwEn]=1
119 AMD_FAMILY_10, // CpuFamily
120 AMD_F10_GT_C0 // CpuRevision
122 {AMD_PF_ALL}, // platformFeatures
124 MSR_BU_CFG2, // MSR Address
125 0x0004000000000000, // OR Mask
126 0x0004000000000000, // NAND Mask
131 CONST REGISTER_TABLE ROMDATA F10HyMsrRegisterTable = {
133 (sizeof (F10HyMsrRegisters) / sizeof (TABLE_ENTRY_FIELDS)),
134 (TABLE_ENTRY_FIELDS *) &F10HyMsrRegisters,