5 * AMD Family_10 RB, MSR tables with values as defined in BKDG
7 * @xrefitem bom "File Content Label" "Release Content"
10 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
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41 ******************************************************************************
44 /*----------------------------------------------------------------------------------------
45 * M O D U L E S U S E D
46 *----------------------------------------------------------------------------------------
49 #include "cpuRegisters.h"
56 #define FILECODE PROC_CPU_FAMILY_0X10_REVC_RB_F10RBMSRTABLES_FILECODE
58 /*----------------------------------------------------------------------------------------
59 * D E F I N I T I O N S A N D M A C R O S
60 *----------------------------------------------------------------------------------------
63 /*----------------------------------------------------------------------------------------
64 * T Y P E D E F S A N D S T R U C T U R E S
65 *----------------------------------------------------------------------------------------
68 /*----------------------------------------------------------------------------------------
69 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
70 *----------------------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------------------
74 * E X P O R T E D F U N C T I O N S
75 *----------------------------------------------------------------------------------------
77 STATIC CONST MSR_TYPE_ENTRY_INITIALIZER ROMDATA F10RbMsrRegisters[] =
80 // ----------------------
82 // MSR_DC_CFG (0xC0011022)
88 AMD_FAMILY_10, // CpuFamily
89 AMD_F10_RB_C0 // CpuRevision
91 {AMD_PF_MULTI_LINK}, // platformFeatures
93 MSR_DC_CFG, // MSR Address
94 0x0000000000000000, // OR Mask
95 0x00000C0000000000, // NAND Mask
99 // MSR_BU_CFG (0xC0011023)
100 // Erratum #309 BU_CFG[23]=1
104 AMD_FAMILY_10, // CpuFamily
105 AMD_F10_RB_C0 // CpuRevision
107 {AMD_PF_ALL}, // platformFeatures
109 MSR_BU_CFG, // MSR Address
110 (1 << 23), // OR Mask
111 (1 << 23), // NAND Mask
116 CONST REGISTER_TABLE ROMDATA F10RbMsrRegisterTable = {
118 (sizeof (F10RbMsrRegisters) / sizeof (TABLE_ENTRY_FIELDS)),
119 (TABLE_ENTRY_FIELDS *) &F10RbMsrRegisters,