5 * AMD Family_10 SW C1e feature support functions.
7 * Provides the functions necessary to initialize the software C1e feature.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: CPU/F10
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
16 ******************************************************************************
18 * Copyright (C) 2012 Advanced Micro Devices, Inc.
19 * All rights reserved.
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ******************************************************************************
46 /*----------------------------------------------------------------------------------------
47 * M O D U L E S U S E D
48 *----------------------------------------------------------------------------------------
52 #include "cpuRegisters.h"
54 #include "cpuApicUtilities.h"
55 #include "cpuF10PowerMgmt.h"
59 #define FILECODE PROC_CPU_FAMILY_0X10_REVC_F10REVCSWC1E_FILECODE
61 /*----------------------------------------------------------------------------------------
62 * D E F I N I T I O N S A N D M A C R O S
63 *----------------------------------------------------------------------------------------
66 /*----------------------------------------------------------------------------------------
67 * T Y P E D E F S A N D S T R U C T U R E S
68 *----------------------------------------------------------------------------------------
71 /*----------------------------------------------------------------------------------------
72 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
73 *----------------------------------------------------------------------------------------
77 F10InitializeSwC1eOnCore (
79 IN AMD_CONFIG_PARAMS *StdHeader
82 /*----------------------------------------------------------------------------------------
83 * E X P O R T E D F U N C T I O N S
84 *----------------------------------------------------------------------------------------
87 /*---------------------------------------------------------------------------------------*/
89 * Should software C1e be enabled
91 * @param[in] SwC1eServices Pointer to this CPU's SW C1e family services.
92 * @param[in] StdHeader Config Handle for library, services.
94 * @retval TRUE SW C1e is supported.
100 IN SW_C1E_FAMILY_SERVICES *SwC1eServices,
101 IN AMD_CONFIG_PARAMS *StdHeader
107 /*---------------------------------------------------------------------------------------*/
109 * Enable Software C1e on a family 10h CPU.
111 * @param[in] SwC1eServices Pointer to this CPU's SW C1e family services.
112 * @param[in] EntryPoint Timepoint designator.
113 * @param[in] PlatformConfig Contains the runtime modifiable feature input data.
114 * @param[in] StdHeader Config Handle for library, services.
116 * @return AGESA_SUCCESS Always succeeds.
122 IN SW_C1E_FAMILY_SERVICES *SwC1eServices,
123 IN UINT64 EntryPoint,
124 IN PLATFORM_CONFIGURATION *PlatformConfig,
125 IN AMD_CONFIG_PARAMS *StdHeader
128 UINT64 LocalMsrRegister;
131 LocalMsrRegister = 0;
132 ((INTPEND_MSR *) &LocalMsrRegister)->IoMsgAddr = PlatformConfig->C1ePlatformData1;
133 ((INTPEND_MSR *) &LocalMsrRegister)->IoMsgData = PlatformConfig->C1ePlatformData2;
134 ((INTPEND_MSR *) &LocalMsrRegister)->IoRd = 0;
135 ((INTPEND_MSR *) &LocalMsrRegister)->C1eOnCmpHalt = 0;
136 ((INTPEND_MSR *) &LocalMsrRegister)->SmiOnCmpHalt = 1;
138 TaskPtr.FuncAddress.PfApTaskI = F10InitializeSwC1eOnCore;
139 TaskPtr.DataTransfer.DataSizeInDwords = 2;
140 TaskPtr.DataTransfer.DataPtr = &LocalMsrRegister;
141 TaskPtr.DataTransfer.DataTransferFlags = 0;
142 TaskPtr.ExeFlags = WAIT_FOR_CORE;
143 ApUtilRunCodeOnAllLocalCoresAtEarly (&TaskPtr, StdHeader, NULL);
145 return AGESA_SUCCESS;
148 /*---------------------------------------------------------------------------------------*/
150 * Enable Software C1e on a family 10h core.
152 * @param[in] IntPendMsr MSR value to write to C001_0055 as determined by core 0.
153 * @param[in] StdHeader Config Handle for library, services.
158 F10InitializeSwC1eOnCore (
160 IN AMD_CONFIG_PARAMS *StdHeader
163 UINT64 LocalMsrRegister;
166 LibAmdMsrWrite (MSR_INTPEND, (UINT64 *) IntPendMsr, StdHeader);
168 // Set OS Visible Workaround Status BIT1 to indicate that C1e
170 LibAmdMsrRead (MSR_OSVW_Status, &LocalMsrRegister, StdHeader);
171 LocalMsrRegister |= BIT1;
172 LibAmdMsrWrite (MSR_OSVW_Status, &LocalMsrRegister, StdHeader);
176 CONST SW_C1E_FAMILY_SERVICES ROMDATA F10SwC1e =