5 * AMD Family_10 Rev C, MSR tables with values as defined in BKDG
7 * @xrefitem bom "File Content Label" "Release Content"
10 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
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41 ******************************************************************************
44 /*----------------------------------------------------------------------------------------
45 * M O D U L E S U S E D
46 *----------------------------------------------------------------------------------------
49 #include "cpuRegisters.h"
54 #define FILECODE PROC_CPU_FAMILY_0X10_REVC_F10REVCMSRTABLES_FILECODE
56 /*----------------------------------------------------------------------------------------
57 * D E F I N I T I O N S A N D M A C R O S
58 *----------------------------------------------------------------------------------------
61 /*----------------------------------------------------------------------------------------
62 * T Y P E D E F S A N D S T R U C T U R E S
63 *----------------------------------------------------------------------------------------
66 /*----------------------------------------------------------------------------------------
67 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
68 *----------------------------------------------------------------------------------------
71 /*----------------------------------------------------------------------------------------
72 * E X P O R T E D F U N C T I O N S
73 *----------------------------------------------------------------------------------------
75 STATIC CONST MSR_TYPE_ENTRY_INITIALIZER ROMDATA F10RevCMsrRegisters[] =
78 // ----------------------
79 // MSR_LS_CFG (0xC0011020)
84 AMD_FAMILY_10, // CpuFamily
85 AMD_F10_GT_B0 // CpuRevision
87 {AMD_PF_ALL}, // platformFeatures
89 MSR_LS_CFG, // MSR Address
90 0x0000000000000000, // OR Mask
91 (1 << 1), // NAND Mask
95 // MSR_BU_CFG (0xC0011023)
100 AMD_FAMILY_10, // CpuFamily
101 AMD_F10_GT_B0 // CpuRevision
103 {AMD_PF_ALL}, // platformFeatures
105 MSR_BU_CFG, // MSR Address
106 (1 << 21), // OR Mask
107 (1 << 21), // NAND Mask
111 // MSR_BU_CFG2 (0xC001102A)
113 // For GH rev C1 and later [RdMmExtCfgQwEn]=1
117 AMD_FAMILY_10, // CpuFamily
118 AMD_F10_GT_C0 // CpuRevision
120 {AMD_PF_ALL}, // platformFeatures
122 MSR_BU_CFG2, // MSR Address
123 0x0004000000000000, // OR Mask
124 0x0004000000000000, // NAND Mask
129 CONST REGISTER_TABLE ROMDATA F10RevCMsrRegisterTable = {
131 (sizeof (F10RevCMsrRegisters) / sizeof (TABLE_ENTRY_FIELDS)),
132 (TABLE_ENTRY_FIELDS *) &F10RevCMsrRegisters,