5 * AMD Family_10 HW C1e feature support functions.
7 * Provides the functions necessary to initialize the hardware C1e feature.
9 * @xrefitem bom "File Content Label" "Release Content"
11 * @e sub-project: CPU/F10
12 * @e \$Revision: 56279 $ @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
16 ******************************************************************************
18 * Copyright (C) 2012 Advanced Micro Devices, Inc.
19 * All rights reserved.
21 * Redistribution and use in source and binary forms, with or without
22 * modification, are permitted provided that the following conditions are met:
23 * * Redistributions of source code must retain the above copyright
24 * notice, this list of conditions and the following disclaimer.
25 * * Redistributions in binary form must reproduce the above copyright
26 * notice, this list of conditions and the following disclaimer in the
27 * documentation and/or other materials provided with the distribution.
28 * * Neither the name of Advanced Micro Devices, Inc. nor the names of
29 * its contributors may be used to endorse or promote products derived
30 * from this software without specific prior written permission.
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
34 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
36 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
37 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
38 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
39 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
40 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
41 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 ******************************************************************************
46 /*----------------------------------------------------------------------------------------
47 * M O D U L E S U S E D
48 *----------------------------------------------------------------------------------------
52 #include "cpuRegisters.h"
54 #include "cpuApicUtilities.h"
55 #include "cpuF10PowerMgmt.h"
56 #include "cpuFamilyTranslation.h"
57 #include "F10PackageType.h"
61 #define FILECODE PROC_CPU_FAMILY_0X10_REVC_F10REVCHWC1E_FILECODE
63 /*----------------------------------------------------------------------------------------
64 * D E F I N I T I O N S A N D M A C R O S
65 *----------------------------------------------------------------------------------------
68 /*----------------------------------------------------------------------------------------
69 * T Y P E D E F S A N D S T R U C T U R E S
70 *----------------------------------------------------------------------------------------
73 /*----------------------------------------------------------------------------------------
74 * P R O T O T Y P E S O F L O C A L F U N C T I O N S
75 *----------------------------------------------------------------------------------------
79 F10InitializeHwC1eOnCore (
81 IN AMD_CONFIG_PARAMS *StdHeader
84 /*----------------------------------------------------------------------------------------
85 * E X P O R T E D F U N C T I O N S
86 *----------------------------------------------------------------------------------------
89 /*---------------------------------------------------------------------------------------*/
91 * Should hardware C1e be enabled
93 * @param[in] HwC1eServices Pointer to this CPU's HW C1e family services.
94 * @param[in] StdHeader Config Handle for library, services.
96 * @retval TRUE HW C1e is supported.
101 F10IsHwC1eSupported (
102 IN HW_C1E_FAMILY_SERVICES *HwC1eServices,
103 IN AMD_CONFIG_PARAMS *StdHeader
107 CPU_LOGICAL_ID LogicalId;
109 GetLogicalIdOfCurrentCore (&LogicalId, StdHeader);
111 if (((LogicalId.Revision & AMD_F10_RB_ALL) & ~(AMD_F10_RB_C3)) != 0) {
115 // Check if it is BL C2 (not S1g3)
116 if ((LogicalId.Revision & AMD_F10_BL_C2) != 0) {
117 PackageType = LibAmdGetPackageType (StdHeader);
118 if (PackageType != PACKAGE_TYPE_S1G3) {
125 /*---------------------------------------------------------------------------------------*/
127 * Enable Hardware C1e on a family 10h CPU.
129 * @param[in] HwC1eServices Pointer to this CPU's HW C1e family services.
130 * @param[in] EntryPoint Timepoint designator.
131 * @param[in] PlatformConfig Contains the runtime modifiable feature input data.
132 * @param[in] StdHeader Config Handle for library, services.
134 * @return AGESA_SUCCESS Always succeeds.
140 IN HW_C1E_FAMILY_SERVICES *HwC1eServices,
141 IN UINT64 EntryPoint,
142 IN PLATFORM_CONFIGURATION *PlatformConfig,
143 IN AMD_CONFIG_PARAMS *StdHeader
147 UINT64 LocalMsrRegister;
150 LocalMsrRegister = 0;
151 C1eData = PlatformConfig->C1ePlatformData;
153 if (PlatformConfig->C1eMode == C1eModeAuto) {
154 C1eData = PlatformConfig->C1ePlatformData3;
157 ((INTPEND_MSR *) &LocalMsrRegister)->IoMsgAddr = C1eData;
158 ((INTPEND_MSR *) &LocalMsrRegister)->IoRd = 1;
159 ((INTPEND_MSR *) &LocalMsrRegister)->C1eOnCmpHalt = 1;
160 ((INTPEND_MSR *) &LocalMsrRegister)->SmiOnCmpHalt = 0;
162 TaskPtr.FuncAddress.PfApTaskI = F10InitializeHwC1eOnCore;
163 TaskPtr.DataTransfer.DataSizeInDwords = 2;
164 TaskPtr.DataTransfer.DataPtr = &LocalMsrRegister;
165 TaskPtr.DataTransfer.DataTransferFlags = 0;
166 TaskPtr.ExeFlags = WAIT_FOR_CORE;
167 ApUtilRunCodeOnAllLocalCoresAtEarly (&TaskPtr, StdHeader, NULL);
169 return AGESA_SUCCESS;
172 /*---------------------------------------------------------------------------------------*/
174 * Enable Hardware C1e on a family 10h core.
176 * @param[in] IntPendMsr MSR value to write to C001_0055 as determined by core 0.
177 * @param[in] StdHeader Config Handle for library, services.
182 F10InitializeHwC1eOnCore (
184 IN AMD_CONFIG_PARAMS *StdHeader
187 UINT64 LocalMsrRegister;
190 LibAmdMsrWrite (MSR_INTPEND, (UINT64 *) IntPendMsr, StdHeader);
192 // Set OS Visible Workaround Status BIT1 to indicate that C1e
194 LibAmdMsrRead (MSR_OSVW_Status, &LocalMsrRegister, StdHeader);
195 LocalMsrRegister |= BIT1;
196 LibAmdMsrWrite (MSR_OSVW_Status, &LocalMsrRegister, StdHeader);
200 CONST HW_C1E_FAMILY_SERVICES ROMDATA F10HwC1e =