src/vendorcode/amd/agesa/f15/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c

   1 /* $NoKeywords:$ */
   2 /**
   3  * @file
   4  *
   5  * AMD Family_10 Rev C HT PCI tables with values as defined in BKDG
   6  *
   7  * @xrefitem bom "File Content Label" "Release Content"
   8  * @e project:      AGESA
   9  * @e sub-project:  CPU/FAMILY/0x10
  10  * @e \$Revision: 56279 $   @e \$Date: 2011-07-11 13:11:28 -0600 (Mon, 11 Jul 2011) $
  11  *
  12  */
  13 /*
  14  ******************************************************************************
  15  *
  16  * Copyright (C) 2012 Advanced Micro Devices, Inc.
  17  * All rights reserved.
  18  *
  19  * Redistribution and use in source and binary forms, with or without
  20  * modification, are permitted provided that the following conditions are met:
  21  *     * Redistributions of source code must retain the above copyright
  22  *       notice, this list of conditions and the following disclaimer.
  23  *     * Redistributions in binary form must reproduce the above copyright
  24  *       notice, this list of conditions and the following disclaimer in the
  25  *       documentation and/or other materials provided with the distribution.
  26  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
  27  *       its contributors may be used to endorse or promote products derived
  28  *       from this software without specific prior written permission.
  29  *
  30  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
  34  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  35  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  37  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  39  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  ******************************************************************************
  42  */
  43
  44 /*----------------------------------------------------------------------------------------
  45  *                             M O D U L E S    U S E D
  46  *----------------------------------------------------------------------------------------
  47  */
  48 #include "AGESA.h"
  49 #include "cpuRegisters.h"
  50 #include "Table.h"
  51 #include "Filecode.h"
  52 CODE_GROUP (G1_PEICC)
  53 RDATA_GROUP (G2_PEI)
  54 #define FILECODE PROC_CPU_FAMILY_0X10_REVC_F10REVCHTPHYTABLES_FILECODE
  55
  56 /*----------------------------------------------------------------------------------------
  57  *                   D E F I N I T I O N S    A N D    M A C R O S
  58  *----------------------------------------------------------------------------------------
  59  */
  60
  61 /*----------------------------------------------------------------------------------------
  62  *                  T Y P E D E F S     A N D     S T R U C T U R E S
  63  *----------------------------------------------------------------------------------------
  64  */
  65
  66 /*----------------------------------------------------------------------------------------
  67  *           P R O T O T Y P E S     O F     L O C A L     F U N C T I O N S
  68  *----------------------------------------------------------------------------------------
  69  */
  70
  71 /*----------------------------------------------------------------------------------------
  72  *                          E X P O R T E D    F U N C T I O N S
  73  *----------------------------------------------------------------------------------------
  74  */
  75
  76 //  HT   Phy T a b l e s
  77 // -------------------------
  78 STATIC CONST TABLE_ENTRY_FIELDS ROMDATA F10RevCHtPhyRegisters[] =
  79 {
  80 // 0x60:0x68
  81   {
  82     HtPhyRangeRegister,
  83     {
  84       AMD_FAMILY_10,                      // CpuFamily
  85       AMD_F10_GT_C0                       // CpuRevision
  86     },
  87     {AMD_PF_ALL},                           // platformFeatures
  88     {{
  89       HTPHY_LINKTYPE_SL0_ALL,               //
  90       0x60, 0x68,                           // Address range
  91       0x00000040,                           // regData
  92       0x00000040,                           // regMask
  93     }}
  94   },
  95 // 0x70:0x78
  96   {
  97     HtPhyRangeRegister,
  98     {
  99       AMD_FAMILY_10,                      // CpuFamily
 100       AMD_F10_GT_C0                       // CpuRevision
 101     },
 102     {AMD_PF_ALL},                           // platformFeatures
 103     {{
 104       HTPHY_LINKTYPE_SL1_ALL,               //
 105       0x70, 0x78,                           // Address range
 106       0x00000040,                           // regData
 107       0x00000040,                           // regMask
 108     }}
 109   },
 110 // Erratum 354
 111 // 0x40:48
 112   {
 113     HtPhyRangeRegister,
 114     {
 115       AMD_FAMILY_10,                      // CpuFamily
 116       (AMD_F10_C2 | AMD_F10_C3)           // CpuRevision
 117     },
 118     {AMD_PF_ALL},                           // platformFeatures
 119     {{
 120       HTPHY_LINKTYPE_SL0_HT3,               //
 121       0x40, 0x48,                           // Address
 122       0x00000040,                           // regData
 123       0x00000040,                           // regMask
 124     }}
 125   },
 126 // 0x50:0x58
 127   {
 128     HtPhyRangeRegister,
 129     {
 130       AMD_FAMILY_10,                      // CpuFamily
 131       (AMD_F10_C2 | AMD_F10_C3)          // CpuRevision
 132     },
 133     {AMD_PF_ALL},                           // platformFeatures
 134     {{
 135       HTPHY_LINKTYPE_SL1_HT3,               //
 136       0x50, 0x58,                           // Address
 137       0x00000040,                           // regData
 138       0x00000040,                           // regMask
 139     }}
 140   },
 141 // 0xC0
 142   {
 143     HtPhyRegister,
 144     {
 145       AMD_FAMILY_10,                      // CpuFamily
 146       AMD_F10_Cx                          // CpuRevision
 147     },
 148     {AMD_PF_ALL},                           // platformFeatures
 149     {{
 150       HTPHY_LINKTYPE_SL0_ALL,               //
 151       0xC0,                                 // Address
 152       0x40040000,                           // regData
 153       0xe01F0000,                           // regMask
 154     }}
 155   },
 156 // 0xD0
 157   {
 158     HtPhyRegister,
 159     {
 160       AMD_FAMILY_10,                      // CpuFamily
 161       AMD_F10_Cx                          // CpuRevision
 162     },
 163     {AMD_PF_ALL},                           // platformFeatures
 164     {{
 165       HTPHY_LINKTYPE_SL1_ALL,               //
 166       0xD0,                                 // Address
 167       0x40040000,                           // regData
 168       0xe01F0000,                           // regMask
 169     }}
 170   },
 171 // 0xCF
 172 // FIFO_PTR_OPT_VALUE
 173   {
 174     HtPhyProfileRegister,
 175     {
 176       AMD_FAMILY_10,                      // CpuFamily
 177       AMD_F10_C3                         // CpuRevision
 178     },
 179     {AMD_PF_ALL},                           // platformFeatures
 180     {{
 181       PERFORMANCE_NB_PSTATES_ENABLE,
 182       HTPHY_LINKTYPE_SL0_HT3,               //
 183       0xCF,                                 // Address
 184       0x0000004A,                           // regData
 185       0x000000FF,                           // regMask
 186     }}
 187   },
 188 // 0xDF
 189 // FIFO_PTR_OPT_VALUE
 190   {
 191     HtPhyProfileRegister,
 192     {
 193       AMD_FAMILY_10,                      // CpuFamily
 194       AMD_F10_C3                         // CpuRevision
 195     },
 196     {AMD_PF_ALL},                           // platformFeatures
 197     {{
 198       PERFORMANCE_NB_PSTATES_ENABLE,
 199       HTPHY_LINKTYPE_SL1_HT3,               //
 200       0xDF,                                 // Address
 201       0x0000004A,                           // regData
 202       0x000000FF,                           // regMask
 203     }}
 204   },
 205 // 0x520A
 206   {
 207     HtPhyRegister,
 208     {
 209       AMD_FAMILY_10,                      // CpuFamily
 210       AMD_F10_Cx                           // CpuRevision
 211     },
 212     {AMD_PF_ALL},                           // platformFeatures
 213     {{
 214       HTPHY_LINKTYPE_SL0_ALL,                   //
 215       0x520A,                               // Address
 216       0x00004000,                           // regData
 217       0x00006000,                           // regMask
 218     }}
 219   },
 220 // 0x530A
 221   {
 222     HtPhyRegister,
 223     {
 224       AMD_FAMILY_10,                      // CpuFamily
 225       AMD_F10_Cx                           // CpuRevision
 226     },
 227     {AMD_PF_ALL},                           // platformFeatures
 228     {{
 229       HTPHY_LINKTYPE_SL1_ALL,                   //
 230       0x530A,                               // Address
 231       0x00004000,                           // regData
 232       0x00006000,                           // regMask
 233     }}
 234   },
 235
 236
 237
 238
 239 //
 240 // Deemphasis Settings
 241 //
 242
 243 // For C3, also set [7]TxLs23ClkGateEn.
 244 //deemphasis level        DL1[20:16], DL2[12:8], DP1[4:0] PostCur1En[31] PostCur2En[30] PreCur1En[29] MapPostCur2En[6]
 245 // No deemphasis            00h        00h          00h     0                0             0             0
 246 // -3dB postcursor          12h        00h          00h     1                0             0             0
 247 // -6dB postcursor          1Fh        00h          00h     1                0             0             0
 248 // -8dB postcursor          1Fh        06h          00h     1                1             0             1
 249 // -11dB postcursor         1Fh        0Dh          00h     1                1             0             1
 250 // -11dB postcursor with
 251 // -8dB precursor           1Fh        06h          07h     1                1             1             1
 252
 253   {
 254     DeemphasisRegister,
 255     {
 256       AMD_FAMILY_10,                      // CpuFamily
 257       AMD_F10_C3                               // CpuRevision
 258     },
 259     {AMD_PF_ALL},                           // platformFeatures
 260     {{
 261       DEEMPHASIS_LEVEL_NONE,
 262       HTPHY_LINKTYPE_SL0_HT3,               //
 263       0xC5,                                 // Address
 264       0x00000080,                           // regData
 265       0xE01F1FDF,                           // regMask
 266     }}
 267   },
 268   {
 269     DeemphasisRegister,
 270     {
 271       AMD_FAMILY_10,                      // CpuFamily
 272       AMD_F10_C3                               // CpuRevision
 273     },
 274     {AMD_PF_ALL},                           // platformFeatures
 275     {{
 276       DEEMPHASIS_LEVEL_NONE,
 277       HTPHY_LINKTYPE_SL1_HT3,               //
 278       0xD5,                                 // Address
 279       0x00000080,                           // regData
 280       0xE01F1FDF,                           // regMask
 281     }}
 282   },
 283   {
 284     DeemphasisRegister,
 285     {
 286       AMD_FAMILY_10,                      // CpuFamily
 287       AMD_F10_C3                               // CpuRevision
 288     },
 289     {AMD_PF_ALL},                           // platformFeatures
 290     {{
 291       DEEMPHASIS_LEVEL__3,
 292       HTPHY_LINKTYPE_SL0_HT3,               //
 293       0xC5,                                 // Address
 294       0x80120080,                           // regData
 295       0xE01F1FDF,                           // regMask
 296     }}
 297   },
 298   {
 299     DeemphasisRegister,
 300     {
 301       AMD_FAMILY_10,                      // CpuFamily
 302       AMD_F10_C3                               // CpuRevision
 303     },
 304     {AMD_PF_ALL},                           // platformFeatures
 305     {{
 306       DEEMPHASIS_LEVEL__3,
 307       HTPHY_LINKTYPE_SL1_HT3,               //
 308       0xD5,                                 // Address
 309       0x80120080,                           // regData
 310       0xE01F1FDF,                           // regMask
 311     }}
 312   },
 313   {
 314     DeemphasisRegister,
 315     {
 316       AMD_FAMILY_10,                      // CpuFamily
 317       AMD_F10_C3                               // CpuRevision
 318     },
 319     {AMD_PF_ALL},                           // platformFeatures
 320     {{
 321       DEEMPHASIS_LEVEL__6,
 322       HTPHY_LINKTYPE_SL0_HT3,               //
 323       0xC5,                                 // Address
 324       0x801F0080,                           // regData
 325       0xE01F1FDF,                           // regMask
 326     }}
 327   },
 328   {
 329     DeemphasisRegister,
 330     {
 331       AMD_FAMILY_10,                      // CpuFamily
 332       AMD_F10_C3                               // CpuRevision
 333     },
 334     {AMD_PF_ALL},                           // platformFeatures
 335     {{
 336       DEEMPHASIS_LEVEL__6,
 337       HTPHY_LINKTYPE_SL1_HT3,               //
 338       0xD5,                                 // Address
 339       0x801F0080,                           // regData
 340       0xE01F1FDF,                           // regMask
 341     }}
 342   },
 343   {
 344     DeemphasisRegister,
 345     {
 346       AMD_FAMILY_10,                      // CpuFamily
 347       AMD_F10_C3                               // CpuRevision
 348     },
 349     {AMD_PF_ALL},                           // platformFeatures
 350     {{
 351       DEEMPHASIS_LEVEL__8,
 352       HTPHY_LINKTYPE_SL0_HT3,               //
 353       0xC5,                                 // Address
 354       0xC01F06C0,                           // regData
 355       0xE01F1FDF,                           // regMask
 356     }}
 357   },
 358   {
 359     DeemphasisRegister,
 360     {
 361       AMD_FAMILY_10,                      // CpuFamily
 362       AMD_F10_C3                               // CpuRevision
 363     },
 364     {AMD_PF_ALL},                           // platformFeatures
 365     {{
 366       DEEMPHASIS_LEVEL__8,
 367       HTPHY_LINKTYPE_SL1_HT3,               //
 368       0xD5,                                 // Address
 369       0xC01F06C0,                           // regData
 370       0xE01F1FDF,                           // regMask
 371     }}
 372   },
 373   {
 374     DeemphasisRegister,
 375     {
 376       AMD_FAMILY_10,                      // CpuFamily
 377       AMD_F10_C3                               // CpuRevision
 378     },
 379     {AMD_PF_ALL},                           // platformFeatures
 380     {{
 381       DEEMPHASIS_LEVEL__11,
 382       HTPHY_LINKTYPE_SL0_HT3,               //
 383       0xC5,                                 // Address
 384       0xC01F0DC0,                           // regData
 385       0xE01F1FDF,                           // regMask
 386     }}
 387   },
 388   {
 389     DeemphasisRegister,
 390     {
 391       AMD_FAMILY_10,                      // CpuFamily
 392       AMD_F10_C3                               // CpuRevision
 393     },
 394     {AMD_PF_ALL},                           // platformFeatures
 395     {{
 396       DEEMPHASIS_LEVEL__11,
 397       HTPHY_LINKTYPE_SL1_HT3,               //
 398       0xD5,                                 // Address
 399       0xC01F0DC0,                           // regData
 400       0xE01F1FDF,                           // regMask
 401     }}
 402   },
 403   {
 404     DeemphasisRegister,
 405     {
 406       AMD_FAMILY_10,                      // CpuFamily
 407       AMD_F10_C3                               // CpuRevision
 408     },
 409     {AMD_PF_ALL},                           // platformFeatures
 410     {{
 411       DEEMPHASIS_LEVEL__11_8,
 412       HTPHY_LINKTYPE_SL0_HT3,               //
 413       0xC5,                                 // Address
 414       0xE01F06C7,                           // regData
 415       0xE01F1FDF,                           // regMask
 416     }}
 417   },
 418   {
 419     DeemphasisRegister,
 420     {
 421       AMD_FAMILY_10,                      // CpuFamily
 422       AMD_F10_C3                               // CpuRevision
 423     },
 424     {AMD_PF_ALL},                           // platformFeatures
 425     {{
 426       DEEMPHASIS_LEVEL__11_8,
 427       HTPHY_LINKTYPE_SL1_HT3,               //
 428       0xD5,                                 // Address
 429       0xE01F06C7,                           // regData
 430       0xE01F1FDF,                           // regMask
 431     }}
 432   },
 433 };
 434
 435 CONST REGISTER_TABLE ROMDATA F10RevCHtPhyRegisterTable = {
 436   PrimaryCores,
 437   (sizeof (F10RevCHtPhyRegisters) / sizeof (TABLE_ENTRY_FIELDS)),
 438   F10RevCHtPhyRegisters
 439 };