4 ; * Agesa library 64bit
6 ; * Contains AMD AGESA Library
8 ; * @xrefitem bom "File Content Label" "Release Content"
10 ; * @e sub-project: Lib
11 ; * @e \$Revision: 17071 $ @e \$Date: 2009-07-30 10:13:11 -0700 (Thu, 30 Jul 2009) $
13 ;*****************************************************************************
15 ; Copyright (C) 2012 Advanced Micro Devices, Inc.
16 ; All rights reserved.
18 ; Redistribution and use in source and binary forms, with or without
19 ; modification, are permitted provided that the following conditions are met:
20 ; * Redistributions of source code must retain the above copyright
21 ; notice, this list of conditions and the following disclaimer.
22 ; * Redistributions in binary form must reproduce the above copyright
23 ; notice, this list of conditions and the following disclaimer in the
24 ; documentation and/or other materials provided with the distribution.
25 ; * Neither the name of Advanced Micro Devices, Inc. nor the names of
26 ; its contributors may be used to endorse or promote products derived
27 ; from this software without specific prior written permission.
29 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
30 ; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
31 ; WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
32 ; DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
33 ; DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 ; (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
35 ; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
36 ; ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
38 ; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 ;*****************************************************************************
45 ;/*---------------------------------------------------------------------------------------*/
49 ; * @param[in] CX IO port address
50 ; * @param[in] DL IO port Value
61 ;/*---------------------------------------------------------------------------------------*/
65 ; * @param[in] CX IO port address
66 ; * @param[in] DX IO port Value
76 ;/*---------------------------------------------------------------------------------------*/
80 ; * @param[in] CX IO port address
81 ; * @param[in] EDX IO port Value
92 ;/*---------------------------------------------------------------------------------------*/
96 ; * @param[in] CX IO port address
97 ; * @retval AL IO port Value
106 ;/*---------------------------------------------------------------------------------------*/
110 ; * @param[in] CX IO port address
111 ; * @retval AX IO port Value
120 ;/*---------------------------------------------------------------------------------------*/
124 ; * @param[in] CX IO port address
125 ; * @retval EAX IO port Value
135 ;/*---------------------------------------------------------------------------------------*/
139 ; * @param[in] RCX MSR Address
140 ; * @param[in] RDX Pointer to data
141 ; * @param[in] R8D ConfigPtr (Optional)
154 ;/*---------------------------------------------------------------------------------------*/
158 ; * @param[in] RCX MSR Address
159 ; * @param[in] RDX Pointer to data
160 ; * @param[in] R8D ConfigPtr (Optional)
162 PUBLIC LibAmdMsrWrite
175 ;/*---------------------------------------------------------------------------------------*/
179 ; * @param[in] RCX CPUID function
180 ; * @param[in] RDX Pointer to CPUID_DATA to save cpuid data
181 ; * @param[in] R8D ConfigPtr (Optional)
183 PUBLIC LibAmdCpuidRead
201 ;/*---------------------------------------------------------------------------------------*/
206 ; * @retval RAX Time stamp counter value
219 ;/*---------------------------------------------------------------------------------------*/
221 ; * Read memory/MMIO byte
223 ; * @param[in] RCX - Memory Address
224 ; * @retval Memory byte at given address
235 ;/*---------------------------------------------------------------------------------------*/
237 ; * Read memory/MMIO word
239 ; * @param[in] RCX - Memory Address
240 ; * @retval Memory word at given address
251 ;/*---------------------------------------------------------------------------------------*/
253 ; * Read memory/MMIO dword
255 ; * @param[in] RCX - Memory Address
256 ; * @retval Memory dword at given address
268 ;/*---------------------------------------------------------------------------------------*/
270 ; * Write memory/MMIO byte
272 ; * @param[in] RCX Memory Address
273 ; * @param[in] DL Value to write
286 ;/*---------------------------------------------------------------------------------------*/
288 ; * Write memory/MMIO word
290 ; * @param[in] RCX Memory Address
291 ; * @param[in] DX Value to write
303 ;/*---------------------------------------------------------------------------------------*/
305 ; * Write memory/MMIO dword
307 ; * @param[in] RCX Memory Address
308 ; * @param[in] EDX Value to write
320 ;/*---------------------------------------------------------------------------------------*/
322 ; * Read various CPU registers
324 ; * @param[in] CL Register ID (0/4 - CR0/CR4, 10h/11h/12h/13h/17h - DR0/DR1/DR2/DR3/DR7)
325 ; * @param[in] RDX Pointer to value
328 PUBLIC LibAmdReadCpuReg
329 LibAmdReadCpuReg PROC
371 LibAmdReadCpuReg ENDP
375 ;/*---------------------------------------------------------------------------------------*/
377 ; * Write various CPU registers
379 ; * @param[in] CL Register ID (0/4 - CR0/CR4, 10h/11h/12h/13h/17h - DR0/DR1/DR2/DR3/DR7)
380 ; * @param[in] RDX Value to write
383 PUBLIC LibAmdWriteCpuReg
384 LibAmdWriteCpuReg PROC
438 LibAmdWriteCpuReg ENDP
440 ;/*---------------------------------------------------------------------------------------*/
442 ; * Write back invalidate caches using wbinvd.
448 PUBLIC LibAmdWriteBackInvalidateCache
449 LibAmdWriteBackInvalidateCache PROC
452 LibAmdWriteBackInvalidateCache ENDP
454 ;/*---------------------------------------------------------------------------------------*/
468 ;/*---------------------------------------------------------------------------------------*/
470 ; * Enter debugger on SimNow
475 PUBLIC LibAmdSimNowEnterDebugger
476 LibAmdSimNowEnterDebugger PROC
478 mov rax, 0BACCD00Bh ; Backdoor in SimNow
479 mov rbx, 2 ; Select breakpoint feature
485 LibAmdSimNowEnterDebugger ENDP
487 ;/*---------------------------------------------------------------------------------------*/
489 ; * IDS IO port write
491 ; * @param[in] ECX IO Port Address
492 ; * @param[in] EDX Value to write
493 ; * @param[in] R8D IDS flags
512 ;/*---------------------------------------------------------------------------------------*/
514 ; * Force breakpoint on HDT
518 PUBLIC LibAmdHDTBreakPoint
519 LibAmdHDTBreakPoint PROC
523 mov rcx, 0C001100Ah ;bit 0 = HDT redirect
524 mov rdi, 09C5A203Ah ;Password
531 mov rax, 0B2h ;Marker = B2
537 LibAmdHDTBreakPoint ENDP
539 ;/*---------------------------------------------------------------------------------------*/
541 ; * Find the most right hand side non-zero bit with
543 ; * @param[in] ECX Value
545 PUBLIC LibAmdBitScanForward
546 LibAmdBitScanForward PROC
552 LibAmdBitScanForward ENDP
554 ;/*---------------------------------------------------------------------------------------*/
556 ; * Find the most left hand side non-zero bit.
558 ; * @param[in] ECX Value
560 PUBLIC LibAmdBitScanReverse
561 LibAmdBitScanReverse PROC
567 LibAmdBitScanReverse ENDP
569 ;/*---------------------------------------------------------------------------------------*/
571 ; * Flush specified number of cache line
573 ; * @param[in] RCX Physical address to be flushed
574 ; * @param[in] DL number of cachelines to be flushed