src/vendorcode/amd/agesa/f15/Include/OptionIdsInstall.h

   1 /* $NoKeywords:$ */
   2 /**
   3  * @file
   4  *
   5  * IDS Option Install File
   6  *
   7  * This file generates the defaults tables for family 10h model 5 processors.
   8  *
   9  * @xrefitem bom "File Content Label" "Release Content"
  10  * @e project:      AGESA
  11  * @e sub-project:  Core
  12  * @e \$Revision: 55277 $   @e \$Date: 2011-06-19 23:03:21 -0600 (Sun, 19 Jun 2011) $
  13  */
  14 /*****************************************************************************
  15  *
  16  * Copyright (C) 2012 Advanced Micro Devices, Inc.
  17  * All rights reserved.
  18  *
  19  * Redistribution and use in source and binary forms, with or without
  20  * modification, are permitted provided that the following conditions are met:
  21  *     * Redistributions of source code must retain the above copyright
  22  *       notice, this list of conditions and the following disclaimer.
  23  *     * Redistributions in binary form must reproduce the above copyright
  24  *       notice, this list of conditions and the following disclaimer in the
  25  *       documentation and/or other materials provided with the distribution.
  26  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
  27  *       its contributors may be used to endorse or promote products derived
  28  *       from this software without specific prior written permission.
  29  *
  30  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  31  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  32  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  33  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
  34  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  35  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  36  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  37  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  39  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  *
  42  ***************************************************************************/
  43 #ifndef _OPTION_IDS_INSTALL_H_
  44 #define _OPTION_IDS_INSTALL_H_
  45 #include "Ids.h"
  46 #include "IdsHt.h"
  47 #include "IdsLib.h"
  48 #ifdef __IDS_EXTENDED__
  49   #include OPTION_IDS_EXT_INSTALL_FILE
  50 #endif
  51
  52 #define IDS_LATE_RUN_AP_TASK
  53
  54 #define M_HTIDS_PORT_OVERRIDE_HOOK (PF_HtIdsGetPortOverride)CommonVoid
  55 #if (IDSOPT_IDS_ENABLED == TRUE)
  56   #if (IDSOPT_CONTROL_ENABLED == TRUE)
  57     // Check for all families which include HT Features.
  58     #if ((OPTION_FAMILY10H == TRUE) || (OPTION_FAMILY15H_OR == TRUE) || (OPTION_FAMILY15H_KM == TRUE)) && (AGESA_ENTRY_INIT_POST == TRUE)
  59       #undef M_HTIDS_PORT_OVERRIDE_HOOK
  60       #define M_HTIDS_PORT_OVERRIDE_HOOK HtIdsGetPortOverride
  61     #endif
  62   #endif
  63 #endif // OPTION_IDS_LEVEL
  64 CONST PF_HtIdsGetPortOverride ROMDATA pf_HtIdsGetPortOverride = M_HTIDS_PORT_OVERRIDE_HOOK;
  65
  66 #if (IDSOPT_IDS_ENABLED == TRUE)
  67   #if (AGESA_ENTRY_INIT_LATE == TRUE)
  68     #undef IDS_LATE_RUN_AP_TASK
  69     #define IDS_LATE_RUN_AP_TASK
  70   #endif
  71 #endif // OPTION_IDS_LEVEL
  72
  73 #if (IDSOPT_TRACING_ENABLED == TRUE)
  74   #if (AGESA_ENTRY_INIT_POST == TRUE)
  75     #include <mu.h>
  76     CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
  77       { (UINT32) (UINT64) MemUWriteCachelines, "WriteCl(PhyAddrLo,BufferAddr,ClCnt)"},
  78       { (UINT32) (UINT64) MemUReadCachelines,  "ReadCl(BufferAddr,PhyAddrLo,ClCnt)"},
  79       { (UINT32) (UINT64) MemUFlushPattern,    "FlushCl(PhyAddrLo,ClCnt)"}
  80     };
  81   #elif (AGESA_ENTRY_INIT_RECOVERY == TRUE)
  82     #include <mru.h>
  83     CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
  84       { (UINT32) (UINT64) MemRecUWrite1CL, "Write1Cl(PhyAddrLo,BufferAddr)"},
  85       { (UINT32) (UINT64) MemRecURead1CL,  "Read1Cl(BufferAddr,PhyAddrLo)"},
  86       { (UINT32) (UINT64) MemRecUFlushPattern,    "Flush1Cl(PhyAddrLo)"}
  87     };
  88   #else
  89     CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
  90       { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"},
  91       { (UINT32) (UINT64) CommonReturnFalse,  "DefRet()"},
  92       { (UINT32) (UINT64) CommonReturnFalse,    "DefRet()"}
  93     };
  94   #endif
  95 #else
  96   CONST SCRIPT_FUNCTION ROMDATA ScriptFuncList[] = {
  97     { (UINT32) (UINT64) CommonReturnFalse, "DefRet()"},
  98     { (UINT32) (UINT64) CommonReturnFalse,  "DefRet()"},
  99     { (UINT32) (UINT64) CommonReturnFalse,    "DefRet()"}
 100   };
 101 #endif
 102
 103
 104 #define NV_TO_CMOS(Len, NV_ID) {Len, NV_ID},
 105 #define OPTION_IDS_NV_TO_CMOS_END NV_TO_CMOS (IDS_NV_TO_CMOS_LEN_END, IDS_NV_TO_CMOS_ID_END)
 106 #if (IDSOPT_IDS_ENABLED == TRUE)
 107   #if ((IDSOPT_CONTROL_ENABLED == TRUE) && \
 108        ((AGESA_ENTRY_INIT_EARLY == TRUE) || (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_ENV == TRUE) || \
 109         (AGESA_ENTRY_INIT_MID == TRUE) || (AGESA_ENTRY_INIT_LATE == TRUE) || (AGESA_ENTRY_INIT_S3SAVE == TRUE) || \
 110         (AGESA_ENTRY_INIT_RESUME == TRUE) || (AGESA_ENTRY_INIT_LATE_RESTORE == TRUE)))
 111     #if (IDSOPT_CONTROL_NV_TO_CMOS == TRUE)
 112       #define OPTION_IDS_NV_TO_CMOS_COMMON
 113
 114       #ifdef OPTION_FAMILY10H
 115         #if OPTION_FAMILY10H == TRUE
 116           #define OPTION_IDS_NV_TO_CMOS_F10
 117         #endif
 118       #endif
 119
 120       #ifdef OPTION_FAMILY12H
 121         #if OPTION_FAMILY12H == TRUE
 122           #define OPTION_IDS_NV_TO_CMOS_F12
 123         #endif
 124       #endif
 125
 126       #ifdef OPTION_FAMILY14H
 127         #if OPTION_FAMILY14H == TRUE
 128           #define OPTION_IDS_NV_TO_CMOS_F14
 129         #endif
 130       #endif
 131
 132       #ifdef OPTION_FAMILY15H_OR
 133         #if OPTION_FAMILY15H_OR == TRUE
 134           #define OPTION_IDS_NV_TO_CMOS_F15_OR
 135         #endif
 136       #endif
 137
 138       #ifdef OPTION_FAMILY15H_TN
 139         #if OPTION_FAMILY15H_TN == TRUE
 140           #define OPTION_IDS_NV_TO_CMOS_F15_TN\
 141             {IDS_NV_TO_CMOS_LEN_BYTE, AGESA_IDS_NV_UCODE},
 142         #endif
 143       #endif
 144
 145       #ifndef OPTION_IDS_NV_TO_CMOS_F10
 146         #define OPTION_IDS_NV_TO_CMOS_F10
 147       #endif
 148
 149       #ifndef OPTION_IDS_NV_TO_CMOS_F12
 150         #define OPTION_IDS_NV_TO_CMOS_F12
 151       #endif
 152
 153       #ifndef OPTION_IDS_NV_TO_CMOS_F14
 154         #define OPTION_IDS_NV_TO_CMOS_F14
 155       #endif
 156
 157       #ifndef OPTION_IDS_NV_TO_CMOS_F15_OR
 158         #define OPTION_IDS_NV_TO_CMOS_F15_OR
 159       #endif
 160
 161       #ifndef OPTION_IDS_NV_TO_CMOS_F15_TN
 162         #define OPTION_IDS_NV_TO_CMOS_F15_TN
 163       #endif
 164
 165       #ifndef OPTION_IDS_NV_TO_CMOS_EXTEND
 166         #define OPTION_IDS_NV_TO_CMOS_EXTEND
 167       #endif
 168
 169       IDS_NV_TO_CMOS gIdsNVToCmos[] = {
 170         OPTION_IDS_NV_TO_CMOS_COMMON
 171         OPTION_IDS_NV_TO_CMOS_F10
 172         OPTION_IDS_NV_TO_CMOS_F12
 173         OPTION_IDS_NV_TO_CMOS_F14
 174         OPTION_IDS_NV_TO_CMOS_F15_OR
 175         OPTION_IDS_NV_TO_CMOS_F15_TN
 176         OPTION_IDS_NV_TO_CMOS_EXTEND
 177         OPTION_IDS_NV_TO_CMOS_END
 178       };
 179     #else
 180       IDS_NV_TO_CMOS gIdsNVToCmos[] = {
 181         OPTION_IDS_NV_TO_CMOS_END
 182       };
 183     #endif
 184   #else
 185     IDS_NV_TO_CMOS gIdsNVToCmos[] = {
 186       OPTION_IDS_NV_TO_CMOS_END
 187     };
 188   #endif
 189 #else
 190   IDS_NV_TO_CMOS gIdsNVToCmos[] = {
 191     OPTION_IDS_NV_TO_CMOS_END
 192   };
 193 #endif
 194
 195 ///Ids Feat Options
 196 #if ((IDSOPT_IDS_ENABLED == TRUE) && \
 197      ((AGESA_ENTRY_INIT_EARLY == TRUE) || (AGESA_ENTRY_INIT_POST == TRUE) || (AGESA_ENTRY_INIT_ENV == TRUE) || \
 198       (AGESA_ENTRY_INIT_MID == TRUE) || (AGESA_ENTRY_INIT_LATE == TRUE) || (AGESA_ENTRY_INIT_S3SAVE == TRUE) || \
 199       (AGESA_ENTRY_INIT_RESUME == TRUE) || (AGESA_ENTRY_INIT_LATE_RESTORE == TRUE)))
 200   #if (IDSOPT_CONTROL_ENABLED == TRUE)
 201     #ifndef OPTION_IDS_EXTEND_FEATS
 202       #define OPTION_IDS_EXTEND_FEATS
 203     #endif
 204
 205     #define OPTION_IDS_FEAT_ECCCTRL\
 206                 OPTION_IDS_FEAT_ECCCTRL_F10 \
 207                 OPTION_IDS_FEAT_ECCCTRL_F12 \
 208                 OPTION_IDS_FEAT_ECCCTRL_F15_OR
 209
 210     #define OPTION_IDS_FEAT_GNB_PLATFORMCFG\
 211                 OPTION_IDS_FEAT_GNB_PLATFORMCFGF12 \
 212                 OPTION_IDS_FEAT_GNB_PLATFORMCFGF14 \
 213                 OPTION_IDS_FEAT_GNB_PLATFORMCFGF15TN
 214
 215     #define OPTION_IDS_FEAT_CPB_CTRL\
 216                 OPTION_IDS_FEAT_CPB_CTRL_F12
 217
 218     #define OPTION_IDS_FEAT_HTC_CTRL\
 219                 OPTION_IDS_FEAT_HTC_CTRL_F15_OR \
 220                 OPTION_IDS_FEAT_HTC_CTRL_F15_TN
 221
 222     #define OPTION_IDS_FEAT_MEMORY_MAPPING\
 223                 OPTION_IDS_FEAT_MEMORY_MAPPING_F12 \
 224                 OPTION_IDS_FEAT_MEMORY_MAPPING_F15_OR \
 225                 OPTION_IDS_FEAT_MEMORY_MAPPING_F15_TN
 226
 227     #define OPTION_IDS_FEAT_HT_ASSIST\
 228                 OPTION_IDS_FEAT_HT_ASSIST_F10HY \
 229                 OPTION_IDS_FEAT_HT_ASSIST_F15_OR
 230
 231     #define OPTION_IDS_FEAT_ECCSYMBOLSIZE\
 232                 OPTION_IDS_FEAT_ECCSYMBOLSIZE_F10 \
 233                 OPTION_IDS_FEAT_ECCSYMBOLSIZE_F15_OR
 234
 235 /*----------------------------------------------------------------------------
 236  *                        Family 10 feat blocks
 237  *
 238  *----------------------------------------------------------------------------
 239  */
 240     #define OPTION_IDS_FEAT_ECCSYMBOLSIZE_F10
 241     #define OPTION_IDS_FEAT_ECCCTRL_F10
 242     #ifdef OPTION_FAMILY10H
 243       #if OPTION_FAMILY10H == TRUE
 244 //Ecc symbol size
 245         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatEccSymbolSizeBlockF10;
 246         #undef OPTION_IDS_FEAT_ECCSYMBOLSIZE_F10
 247         #define OPTION_IDS_FEAT_ECCSYMBOLSIZE_F10 &IdsFeatEccSymbolSizeBlockF10,
 248
 249 //ECC scrub control
 250         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatEccCtrlBlockF10;
 251         #undef OPTION_IDS_FEAT_ECCCTRL_F10
 252         #define OPTION_IDS_FEAT_ECCCTRL_F10 &IdsFeatEccCtrlBlockF10,
 253       #endif
 254     #endif
 255
 256     //Misc Features
 257     #define OPTION_IDS_FEAT_HT_ASSIST_F10HY
 258     #ifdef OPTION_FAMILY10H_HY
 259       #if OPTION_FAMILY10H_HY == TRUE
 260         #undef OPTION_IDS_FEAT_HT_ASSIST_F10HY
 261         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHtAssistBlockPlatformCfgF10Hy;
 262
 263         #define OPTION_IDS_FEAT_HT_ASSIST_F10HY \
 264                     &IdsFeatHtAssistBlockPlatformCfgF10Hy,
 265       #endif
 266     #endif
 267 /*----------------------------------------------------------------------------
 268  *                        Family 12 feat blocks
 269  *
 270  *----------------------------------------------------------------------------
 271  */
 272     #define OPTION_IDS_FEAT_GNB_PLATFORMCFGF12
 273     #define OPTION_IDS_FEAT_ECCCTRL_F12
 274     #define OPTION_IDS_FEAT_CPB_CTRL_F12
 275     #define OPTION_IDS_FEAT_MEMORY_MAPPING_F12
 276     #ifdef OPTION_FAMILY12H
 277       #if OPTION_FAMILY12H == TRUE
 278         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatGnbPlatformCfgBlockF12;
 279         #undef OPTION_IDS_FEAT_GNB_PLATFORMCFGF12
 280         #define OPTION_IDS_FEAT_GNB_PLATFORMCFGF12 &IdsFeatGnbPlatformCfgBlockF12,
 281
 282         //ECC scrub control
 283         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatEccCtrlBlockF12;
 284         #undef OPTION_IDS_FEAT_ECCCTRL_F12
 285         #define OPTION_IDS_FEAT_ECCCTRL_F12 &IdsFeatEccCtrlBlockF12,
 286
 287         #undef OPTION_IDS_FEAT_CPB_CTRL_F12
 288         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatCpbCtrlBlockF12;
 289         #define OPTION_IDS_FEAT_CPB_CTRL_F12 &IdsFeatCpbCtrlBlockF12,
 290
 291         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatMemoryChIntlvPostBeforeBlockF12;
 292         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatMemoryMappingChIntlvBlockF12;
 293         #undef OPTION_IDS_FEAT_MEMORY_MAPPING_F12
 294         #define OPTION_IDS_FEAT_MEMORY_MAPPING_F12 \
 295                     &IdsFeatMemoryChIntlvPostBeforeBlockF12, \
 296                     &IdsFeatMemoryMappingChIntlvBlockF12,
 297
 298       #endif
 299     #endif
 300
 301 /*----------------------------------------------------------------------------
 302  *                        Family 14 feat blocks
 303  *
 304  *----------------------------------------------------------------------------
 305  */
 306     #define OPTION_IDS_FEAT_GNB_PLATFORMCFGF14
 307     #ifdef OPTION_FAMILY14H
 308       #if OPTION_FAMILY14H == TRUE
 309         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatGnbPlatformCfgBlockF14;
 310         #undef OPTION_IDS_FEAT_GNB_PLATFORMCFGF14
 311         #define OPTION_IDS_FEAT_GNB_PLATFORMCFGF14 &IdsFeatGnbPlatformCfgBlockF14,
 312       #endif
 313     #endif
 314
 315 /*----------------------------------------------------------------------------
 316  *                        Family 15 OR feat blocks
 317  *
 318  *----------------------------------------------------------------------------
 319  */
 320     #define OPTION_IDS_FEAT_HTC_CTRL_F15_OR
 321     #define OPTION_IDS_FEAT_MEMORY_MAPPING_F15_OR
 322     #define OPTION_IDS_FEAT_HT_ASSIST_F15_OR
 323     #define OPTION_IDS_FEAT_ECCCTRL_F15_OR
 324     #define OPTION_IDS_FEAT_ECCSYMBOLSIZE_F15_OR
 325     #ifdef OPTION_FAMILY15H_OR
 326       #if OPTION_FAMILY15H_OR == TRUE
 327         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHtcControlBlockF15Or;
 328         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHtcControlLateBlockF15Or;
 329         #undef OPTION_IDS_FEAT_HTC_CTRL_F15_OR
 330         #define OPTION_IDS_FEAT_HTC_CTRL_F15_OR\
 331                     &IdsFeatHtcControlBlockF15Or,\
 332                     &IdsFeatHtcControlLateBlockF15Or,
 333
 334         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatMemoryMappingPostBeforeBlockF15Or;
 335         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatMemoryMappingChIntlvBlockF15Or;
 336         #undef OPTION_IDS_FEAT_MEMORY_MAPPING_F15_OR
 337         #define OPTION_IDS_FEAT_MEMORY_MAPPING_F15_OR\
 338         &IdsFeatMemoryMappingPostBeforeBlockF15Or,\
 339         &IdsFeatMemoryMappingChIntlvBlockF15Or,
 340
 341         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHtAssistBlockPlatformCfgF15Or;
 342         #undef OPTION_IDS_FEAT_HT_ASSIST_F15_OR
 343         #define OPTION_IDS_FEAT_HT_ASSIST_F15_OR\
 344         &IdsFeatHtAssistBlockPlatformCfgF15Or,
 345
 346         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatEccCtrlBlockF15Or;
 347         #undef OPTION_IDS_FEAT_ECCCTRL_F15_OR
 348         #define OPTION_IDS_FEAT_ECCCTRL_F15_OR &IdsFeatEccCtrlBlockF15Or,
 349
 350         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatEccSymbolSizeBlockF15Or;
 351         #undef OPTION_IDS_FEAT_ECCSYMBOLSIZE_F15_OR
 352         #define OPTION_IDS_FEAT_ECCSYMBOLSIZE_F15_OR &IdsFeatEccSymbolSizeBlockF15Or,
 353
 354       #endif
 355     #endif
 356 /*----------------------------------------------------------------------------
 357  *                        Family 15 TN feat blocks
 358  *
 359  *----------------------------------------------------------------------------
 360  */
 361     #define OPTION_IDS_FEAT_HTC_CTRL_F15_TN
 362     #define OPTION_IDS_FEAT_MEMORY_MAPPING_F15_TN
 363     #define OPTION_IDS_FEAT_GNB_PLATFORMCFGF15TN
 364     #ifdef OPTION_FAMILY15H_TN
 365       #if OPTION_FAMILY15H_TN == TRUE
 366         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHtcControlBlockF15Tn;
 367         #undef OPTION_IDS_FEAT_HTC_CTRL_F15_TN
 368         #define OPTION_IDS_FEAT_HTC_CTRL_F15_TN\
 369                     &IdsFeatHtcControlBlockF15Tn,
 370
 371         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatMemoryMappingPostBeforeBlockF15Tn;
 372         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatMemoryMappingChIntlvBlockF15Tn;
 373         #undef OPTION_IDS_FEAT_MEMORY_MAPPING_F15_TN
 374         #define OPTION_IDS_FEAT_MEMORY_MAPPING_F15_TN\
 375         &IdsFeatMemoryMappingPostBeforeBlockF15Tn,\
 376         &IdsFeatMemoryMappingChIntlvBlockF15Tn,
 377
 378         extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatGnbPlatformCfgBlockF15Tn;
 379         #undef OPTION_IDS_FEAT_GNB_PLATFORMCFGF15TN
 380         #define OPTION_IDS_FEAT_GNB_PLATFORMCFGF15TN &IdsFeatGnbPlatformCfgBlockF15Tn,
 381       #endif
 382     #endif
 383
 384     #define OPTION_IDS_FEAT_NV_TO_CMOS
 385     #if IDSOPT_CONTROL_NV_TO_CMOS == TRUE
 386       #undef OPTION_IDS_FEAT_NV_TO_CMOS
 387       extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatNvToCmosSaveBlock;
 388       extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatNvToCmosRestoreBlock;
 389       #define OPTION_IDS_FEAT_NV_TO_CMOS\
 390         &IdsFeatNvToCmosSaveBlock, \
 391         &IdsFeatNvToCmosRestoreBlock,
 392
 393     #endif
 394     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatUcodeBlock =
 395     {
 396       IDS_FEAT_UCODE_UPDATE,
 397       IDS_ALL_CORES,
 398       IDS_UCODE,
 399       IDS_FAMILY_ALL,
 400       IdsSubUCode
 401     };
 402
 403     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatPowerPolicyBlock =
 404     {
 405       IDS_FEAT_POWER_POLICY,
 406       IDS_ALL_CORES,
 407       IDS_PLATFORMCFG_OVERRIDE,
 408       IDS_FAMILY_ALL,
 409       IdsSubPowerPolicyOverride
 410     };
 411
 412     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatTargetPstateBlock =
 413     {
 414       IDS_FEAT_TARGET_PSTATE,
 415       IDS_BSP_ONLY,
 416       IDS_INIT_LATE_AFTER,
 417       IDS_FAMILY_ALL,
 418       IdsSubTargetPstate
 419     };
 420
 421     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatPostPstateBlock =
 422     {
 423       IDS_FEAT_POSTPSTATE,
 424       IDS_ALL_CORES,
 425       IDS_CPU_Early_Override,
 426       IDS_FAMILY_ALL,
 427       IdsSubPostPState
 428     };
 429
 430     //Dram controller Features
 431     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatDctAllMemClkBlock =
 432     {
 433       IDS_FEAT_DCT_ALLMEMCLK,
 434       IDS_BSP_ONLY,
 435       IDS_ALL_MEMORY_CLOCK,
 436       IDS_FAMILY_ALL,
 437       IdsSubAllMemClkEn
 438     };
 439
 440     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatDctGangModeBlock =
 441     {
 442       IDS_FEAT_DCT_GANGMODE,
 443       IDS_BSP_ONLY,
 444       IDS_GANGING_MODE,
 445       IDS_FAMILY_ALL,
 446       IdsSubGangingMode
 447     };
 448
 449     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatDctBurstLengthBlock =
 450     {
 451       IDS_FEAT_DCT_BURSTLENGTH,
 452       IDS_BSP_ONLY,
 453       IDS_BURST_LENGTH32,
 454       AMD_FAMILY_10,
 455       IdsSubBurstLength32
 456     };
 457
 458     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatDctPowerDownCtrlBlock =
 459     {
 460       IDS_FEAT_DCT_POWERDOWN,
 461       IDS_BSP_ONLY,
 462       IDS_INIT_POST_BEFORE,
 463       IDS_FAMILY_ALL,
 464       IdsSubPowerDownCtrl
 465     };
 466
 467     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatDctDllShutDownBlock =
 468     {
 469       IDS_FEAT_DCT_DLLSHUTDOWN,
 470       IDS_BSP_ONLY,
 471       IDS_DLL_SHUT_DOWN,
 472       IDS_FAMILY_ALL,
 473       IdsSubDllShutDownSR
 474     };
 475
 476
 477     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatDctPowerDownModeBlock =
 478     {
 479       IDS_FEAT_DCT_POWERDOWN,
 480       IDS_BSP_ONLY,
 481       IDS_POWERDOWN_MODE,
 482       IDS_FAMILY_ALL,
 483       IdsSubPowerDownMode
 484     };
 485
 486     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHdtOutBlock =
 487     {
 488       IDS_FEAT_HDTOUT,
 489       IDS_BSP_ONLY,
 490       IDS_INIT_EARLY_BEFORE,
 491       IDS_FAMILY_ALL,
 492       IdsSubHdtOut
 493     };
 494
 495     CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatHtSettingBlock =
 496     {
 497       IDS_FEAT_HT_SETTING,
 498       IDS_BSP_ONLY,
 499       IDS_HT_CONTROL,
 500       IDS_FAMILY_ALL,
 501       IdsSubHtLinkControl
 502     };
 503
 504     CONST IDS_FAMILY_FEAT_STRUCT* ROMDATA IdsContorlFeats[] =
 505     {
 506       &IdsFeatUcodeBlock,
 507       &IdsFeatPowerPolicyBlock,
 508
 509       &IdsFeatTargetPstateBlock,
 510
 511       &IdsFeatPostPstateBlock,
 512
 513       OPTION_IDS_FEAT_NV_TO_CMOS
 514
 515       OPTION_IDS_FEAT_ECCSYMBOLSIZE
 516
 517       OPTION_IDS_FEAT_ECCCTRL
 518
 519       &IdsFeatDctAllMemClkBlock,
 520
 521       &IdsFeatDctGangModeBlock,
 522
 523       &IdsFeatDctBurstLengthBlock,
 524
 525       &IdsFeatDctPowerDownCtrlBlock,
 526
 527       &IdsFeatDctPowerDownModeBlock,
 528
 529       &IdsFeatDctPowerDownModeBlock,
 530
 531       OPTION_IDS_FEAT_HT_ASSIST
 532
 533       &IdsFeatHdtOutBlock,
 534
 535       &IdsFeatHtSettingBlock,
 536
 537       OPTION_IDS_FEAT_GNB_PLATFORMCFG
 538
 539       OPTION_IDS_FEAT_CPB_CTRL
 540
 541       OPTION_IDS_FEAT_HTC_CTRL
 542
 543       OPTION_IDS_FEAT_MEMORY_MAPPING
 544
 545       OPTION_IDS_EXTEND_FEATS
 546
 547       NULL
 548     };
 549   #else
 550     CONST IDS_FAMILY_FEAT_STRUCT* ROMDATA IdsContorlFeats[] =
 551     {
 552       NULL
 553     };
 554   #endif//IDSOPT_CONTROL_ENABLED
 555
 556   #define OPTION_IDS_FAM_REGACC\
 557             OPTION_IDS_FAM_REGACC_F15TN
 558
 559   #define OPTION_IDS_FAM_REGACC_F15TN
 560   #ifdef OPTION_FAMILY15H_TN
 561     #if OPTION_FAMILY15H_TN == TRUE
 562       extern CONST IDS_FAMILY_FEAT_STRUCT ROMDATA IdsFeatRegGmmxF15Tn;
 563       #undef OPTION_IDS_FAM_REGACC_F15TN
 564       #define OPTION_IDS_FAM_REGACC_F15TN \
 565                 &IdsFeatRegGmmxF15Tn,
 566     #endif
 567   #endif
 568
 569   CONST IDS_FAMILY_FEAT_STRUCT* ROMDATA IdsRegAccessTbl[] =
 570   {
 571     OPTION_IDS_FAM_REGACC
 572     NULL
 573   };
 574
 575 #else
 576   CONST IDS_FAMILY_FEAT_STRUCT* ROMDATA IdsContorlFeats[] =
 577   {
 578     NULL
 579   };
 580
 581   CONST IDS_FAMILY_FEAT_STRUCT* ROMDATA IdsRegAccessTbl[] =
 582   {
 583     NULL
 584   };
 585 #endif// IDSOPT_IDS_ENABLED
 586
 587
 588 #endif