AGESA F15: AMD family15 AGESA code
[coreboot.git] / src / vendorcode / amd / agesa / f15 / Include / OptionHtInstall.h
1 /* $NoKeywords:$ */
2 /**
3  * @file
4  *
5  * Install of build option: Ht
6  *
7  * Contains AMD AGESA install macros and test conditions. Output is the
8  * defaults tables reflecting the User's build options selection.
9  *
10  * @xrefitem bom "File Content Label" "Release Content"
11  * @e project:      AGESA
12  * @e sub-project:  Options
13  * @e \$Revision: 51975 $   @e \$Date: 2011-04-29 01:33:06 -0600 (Fri, 29 Apr 2011) $
14  */
15 /*****************************************************************************
16  *
17  * Copyright (C) 2012 Advanced Micro Devices, Inc.
18  * All rights reserved.
19  *
20  * Redistribution and use in source and binary forms, with or without
21  * modification, are permitted provided that the following conditions are met:
22  *     * Redistributions of source code must retain the above copyright
23  *       notice, this list of conditions and the following disclaimer.
24  *     * Redistributions in binary form must reproduce the above copyright
25  *       notice, this list of conditions and the following disclaimer in the
26  *       documentation and/or other materials provided with the distribution.
27  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
28  *       its contributors may be used to endorse or promote products derived
29  *       from this software without specific prior written permission.
30  *
31  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41  *
42  *
43  ***************************************************************************/
44
45 #ifndef _OPTION_HT_INSTALL_H_
46 #define _OPTION_HT_INSTALL_H_
47
48 #include "Topology.h"
49 #include "htFeat.h"
50 #include "htInterface.h"
51 #include "htNb.h"
52 #include "htTopologies.h"
53 /*
54  * Advanced Option only, hardware socket naming is the preferred method.
55  */
56 #ifdef BLDCFG_SYSTEM_PHYSICAL_SOCKET_MAP
57   #define CFG_SYSTEM_PHYSICAL_SOCKET_MAP         (BLDCFG_SYSTEM_PHYSICAL_SOCKET_MAP)
58 #else
59   #define CFG_SYSTEM_PHYSICAL_SOCKET_MAP         (NULL)
60 #endif
61
62 /*
63  * OPTION_IS_RECOVERY_HT is true if Basic API is being used.
64  */
65 #ifndef OPTION_IS_RECOVERY_HT
66   #define OPTION_IS_RECOVERY_HT TRUE
67 #endif
68
69 /*  This option is designed to be included into the platform solution install
70  *  file. The platform solution install file will define the options status.
71  *  Check to validate the definition.
72  */
73
74 #ifndef OPTION_MULTISOCKET
75   #error  BLDOPT: Option not defined: "OPTION_MULTISOCKET"
76 #endif
77
78 /*
79  * Based on user level options, set Ht internal options.
80  * For now, Family 10h support will assume single module.  For multi module,
81  * this will have to be changed to not set non-coherent only.
82  */
83 #define OPTION_HT_NON_COHERENT_ONLY FALSE
84
85 #if ((OPTION_FAMILY12H == TRUE) || (OPTION_FAMILY14H == TRUE))
86 /* Families with only PCIe do not need a non-coherent only option. */
87 #else
88   // Process Family 10h and 15h Models 00h-0Fh by socket, applying the MultiSocket option where it is allowable.
89   #if OPTION_G34_SOCKET_SUPPORT == FALSE
90   // Hydra has coherent support, other Family 10h should follow MultiSocket support.
91     #if OPTION_MULTISOCKET == FALSE
92       #undef OPTION_HT_NON_COHERENT_ONLY
93       #define OPTION_HT_NON_COHERENT_ONLY TRUE
94     #endif
95   #endif
96 #endif
97
98 /*
99  * Macros will generate the correct item reference based on options
100  */
101 #if AGESA_ENTRY_INIT_EARLY == TRUE
102   // Select the interface and features
103   #if ((OPTION_FAMILY12H == TRUE) || (OPTION_FAMILY14H == TRUE))
104     #define INTERNAL_HT_OPTION_BUILTIN_TOPOLOGIES NULL
105     #define INTERNAL_HT_OPTION_FEATURES     &HtFeaturesNone
106     #define INTERNAL_HT_OPTION_INTERFACE    &HtInterfaceMapsOnly
107   #else
108       // Family 10h and 15h Models 00h-0Fh
109       #if OPTION_HT_NON_COHERENT_ONLY == FALSE
110         #define INTERNAL_HT_OPTION_FEATURES     &HtFeaturesDefault
111         #define INTERNAL_HT_OPTION_INTERFACE    &HtInterfaceDefault
112       #else
113         #define INTERNAL_HT_OPTION_BUILTIN_TOPOLOGIES NULL
114         #define INTERNAL_HT_OPTION_FEATURES     &HtFeaturesNonCoherentOnly
115         #define INTERNAL_HT_OPTION_INTERFACE    &HtInterfaceNonCoherentOnly
116       #endif
117     #endif
118   // Select Northbridge components
119   #if OPTION_FAMILY10H == TRUE
120     #if OPTION_HT_NON_COHERENT_ONLY == TRUE
121       #define INTERNAL_HT_OPTION_FAM10_NB     &HtFam10NbNonCoherentOnly, &HtFam10RevDNbNonCoherentOnly, &HtFam10RevENbNonCoherentOnly,
122     #else
123       #define INTERNAL_HT_OPTION_FAM10_NB     &HtFam10NbDefault, &HtFam10RevDNbDefault, &HtFam10RevENbDefault,
124     #endif
125   #else
126     #define INTERNAL_HT_OPTION_FAM10_NB
127   #endif
128
129   #if OPTION_FAMILY12H == TRUE
130     #define INTERNAL_HT_OPTION_FAM12_NB     &HtFam12Nb,
131   #else
132     #define INTERNAL_HT_OPTION_FAM12_NB
133   #endif
134
135   #if OPTION_FAMILY14H == TRUE
136       #define INTERNAL_HT_OPTION_FAM14_NB     &HtFam14Nb,
137   #else
138     #define INTERNAL_HT_OPTION_FAM14_NB
139   #endif
140
141   #if OPTION_FAMILY15H == TRUE
142     #if OPTION_FAMILY15H_OR == TRUE
143       #if OPTION_HT_NON_COHERENT_ONLY == TRUE
144         #define INTERNAL_HT_OPTION_FAM15_NB     &HtFam15NbNonCoherentOnly,
145       #else
146         #define INTERNAL_HT_OPTION_FAM15_NB     &HtFam15NbDefault,
147       #endif
148     #else
149       #define INTERNAL_HT_OPTION_FAM15_NB
150     #endif
151       #define INTERNAL_HT_OPTION_FAM15TN_NB
152       #define INTERNAL_HT_OPTION_FAM15KM_NB
153   #else
154     #define INTERNAL_HT_OPTION_FAM15_NB
155     #define INTERNAL_HT_OPTION_FAM15TN_NB
156     #define INTERNAL_HT_OPTION_FAM15KM_NB
157   #endif
158
159   #define INTERNAL_ONLY_NB_LIST_ITEM INTERNAL_ONLY_HT_OPTION_SUPPORTED_NBS,
160   #ifndef INTERNAL_ONLY_HT_OPTION_SUPPORTED_NBS
161     #undef INTERNAL_ONLY_NB_LIST_ITEM
162     #define INTERNAL_ONLY_NB_LIST_ITEM
163   #endif
164
165   /* Install the correct set of northbridge implementations. Each item provides its own comma, the last item
166    * is ok to have a comma because the final item (NULL) is added below.
167    */
168   #define INTERNAL_HT_OPTION_SUPPORTED_NBS \
169                                              INTERNAL_ONLY_NB_LIST_ITEM \
170                                              INTERNAL_HT_OPTION_FAM10_NB \
171                                              INTERNAL_HT_OPTION_FAM15_NB \
172                                              INTERNAL_HT_OPTION_FAM12_NB \
173                                              INTERNAL_HT_OPTION_FAM14_NB
174 #else
175   // Not Init Early
176   #define INTERNAL_HT_OPTION_FEATURES     NULL
177   #define INTERNAL_HT_OPTION_INTERFACE    NULL
178   #define INTERNAL_HT_OPTION_SUPPORTED_NBS NULL
179   #define HT_OPTIONS_PLATFORM             NULL
180   #define INTERNAL_HT_OPTION_BUILTIN_TOPOLOGIES NULL
181 #endif
182
183 #ifdef AGESA_ENTRY_INIT_EARLY
184   #if AGESA_ENTRY_INIT_EARLY == TRUE
185
186     extern HT_FEATURES HtFeaturesDefault;
187     extern HT_FEATURES HtFeaturesNonCoherentOnly;
188     extern HT_FEATURES HtFeaturesCoherentOnly;
189     extern HT_FEATURES HtFeaturesNone;
190     extern HT_INTERFACE HtInterfaceDefault;
191     extern HT_INTERFACE HtInterfaceNonCoherentOnly;
192     extern HT_INTERFACE HtInterfaceCoherentOnly;
193     extern HT_INTERFACE HtInterfaceMapsOnly;
194     extern HT_INTERFACE HtInterfaceNone;
195     extern NORTHBRIDGE HtFam10NbDefault;
196     extern NORTHBRIDGE HtFam10RevDNbDefault;
197     extern NORTHBRIDGE HtFam10NbNonCoherentOnly;
198     extern NORTHBRIDGE HtFam10RevDNbNonCoherentOnly;
199     extern NORTHBRIDGE HtFam10RevENbDefault;
200     extern NORTHBRIDGE HtFam10RevENbNonCoherentOnly;
201     extern NORTHBRIDGE HtFam12Nb;
202     extern NORTHBRIDGE HtFam14Nb;
203     extern NORTHBRIDGE HtFam10NbNone;
204     extern NORTHBRIDGE HtFam15NbDefault;
205     extern NORTHBRIDGE HtFam15NbNonCoherentOnly;
206
207     CONST VOID * CONST ROMDATA HtInstalledFamilyNorthbridgeList[] = {
208       INTERNAL_HT_OPTION_SUPPORTED_NBS
209       NULL
210     };
211
212     STATIC CONST AMD_HT_INTERFACE ROMDATA HtOptionsPlatform =
213     {
214       CFG_STARTING_BUSNUM, CFG_MAXIMUM_BUSNUM, CFG_ALLOCATED_BUSNUM,
215       (MANUAL_BUID_SWAP_LIST *)CFG_BUID_SWAP_LIST,
216       (DEVICE_CAP_OVERRIDE *)CFG_HTDEVICE_CAPABILITIES_OVERRIDE_LIST,
217       (CPU_TO_CPU_PCB_LIMITS *)CFG_HTFABRIC_LIMITS_LIST,
218       (IO_PCB_LIMITS *)CFG_HTCHAIN_LIMITS_LIST,
219       (OVERRIDE_BUS_NUMBERS *)CFG_BUS_NUMBERS_LIST,
220       (IGNORE_LINK *)CFG_IGNORE_LINK_LIST,
221       (SKIP_REGANG *)CFG_LINK_SKIP_REGANG_LIST,
222       (UINT8 **)CFG_ADDITIONAL_TOPOLOGIES_LIST,
223       (SYSTEM_PHYSICAL_SOCKET_MAP *)CFG_SYSTEM_PHYSICAL_SOCKET_MAP
224     };
225     #ifndef HT_OPTIONS_PLATFORM
226       #define HT_OPTIONS_PLATFORM &HtOptionsPlatform
227     #endif
228
229     /**
230      * A list of all the supported topologies.
231      *
232      */
233     #ifndef INTERNAL_HT_OPTION_BUILTIN_TOPOLOGIES
234       CONST UINT8 *CONST ROMDATA AmdTopolist[] =
235       {
236         amdHtTopologySingleNode,
237         amdHtTopologyDualNode,
238         amdHtTopologyThreeLine,
239         amdHtTopologyTriangle,
240         amdHtTopologyFourLine,
241         amdHtTopologyFourStar,
242         amdHtTopologyFourDegenerate,
243         amdHtTopologyFourSquare,
244         amdHtTopologyFourKite,
245         amdHtTopologyFourFully,
246         amdHtTopologyFiveFully,
247         amdHtTopologyFiveTwistedLadder,
248         amdHtTopologySixFully,
249         amdHtTopologySixDoubloonLower,
250         amdHtTopologySixDoubloonUpper,
251         amdHtTopologySixTwistedLadder,
252         amdHtTopologySevenFully,
253         amdHtTopologySevenTwistedLadder,
254         amdHtTopologyEightFully,
255         amdHtTopologyEightDoubloon,
256         amdHtTopologyEightTwistedLadder,
257         amdHtTopologyEightStraightLadder,
258         amdHtTopologySixTwinTriangles,
259         amdHtTopologyEightTwinFullyFourWays,
260         NULL
261       };
262       #define INTERNAL_HT_OPTION_BUILTIN_TOPOLOGIES AmdTopolist
263     #endif
264
265     /**
266      * Declare the instance of the Ht option configuration structure
267      */
268     CONST OPTION_HT_CONFIGURATION ROMDATA OptionHtConfiguration = {
269       OPTION_IS_RECOVERY_HT,
270       CFG_SET_HTCRC_SYNC_FLOOD,
271       CFG_USE_UNIT_ID_CLUMPING,
272       HT_OPTIONS_PLATFORM,
273       INTERNAL_HT_OPTION_INTERFACE,
274       INTERNAL_HT_OPTION_FEATURES,
275       &HtInstalledFamilyNorthbridgeList,
276       INTERNAL_HT_OPTION_BUILTIN_TOPOLOGIES
277     };
278
279   #endif
280 #endif
281
282 #ifndef OPTION_HT_INIIT_RESET_ENTRY
283
284   #define OPTION_HT_INIIT_RESET_ENTRY AmdHtInitReset
285   #define OPTION_HT_INIIT_RESET_CONSTRUCTOR_ENTRY AmdHtResetConstructor
286
287   #if ((OPTION_FAMILY12H == TRUE) || (OPTION_FAMILY14H == TRUE))
288     #undef OPTION_HT_INIIT_RESET_ENTRY
289     #undef OPTION_HT_INIIT_RESET_CONSTRUCTOR_ENTRY
290     #define OPTION_HT_INIIT_RESET_ENTRY NULL
291     #define OPTION_HT_INIIT_RESET_CONSTRUCTOR_ENTRY NULL
292   #endif
293
294   #if ((OPTION_FAMILY10H == TRUE) || (OPTION_FAMILY15H_OR == TRUE))
295     #undef OPTION_HT_INIIT_RESET_ENTRY
296     #undef OPTION_HT_INIIT_RESET_CONSTRUCTOR_ENTRY
297     #define OPTION_HT_INIIT_RESET_ENTRY AmdHtInitReset
298     #define OPTION_HT_INIIT_RESET_CONSTRUCTOR_ENTRY AmdHtResetConstructor
299   #endif
300
301 #endif
302
303 #ifdef AGESA_ENTRY_INIT_RESET
304   #if AGESA_ENTRY_INIT_RESET == TRUE
305
306     CONST AMD_HT_RESET_INTERFACE ROMDATA HtOptionResetDefaults = {
307       (MANUAL_BUID_SWAP_LIST *)CFG_BUID_SWAP_LIST,
308       0                                            // Unused by options
309     };
310
311     CONST OPTION_HT_INIT_RESET ROMDATA HtOptionInitReset = {
312       OPTION_HT_INIIT_RESET_ENTRY,
313       OPTION_HT_INIIT_RESET_CONSTRUCTOR_ENTRY
314     };
315   #endif
316
317 #endif
318
319 #endif  // _OPTION_HT_INSTALL_H_