AGESA F15: AMD family15 AGESA code
[coreboot.git] / src / vendorcode / amd / agesa / f15 / Include / OptionCpuCoreLevelingInstall.h
1 /* $NoKeywords:$ */
2 /**
3  * @file
4  *
5  * Install of build option: CPU Core Leveling
6  *
7  * Contains AMD AGESA install macros and test conditions. Output is the
8  * defaults tables reflecting the User's build options selection.
9  *
10  * @xrefitem bom "File Content Label" "Release Content"
11  * @e project:      AGESA
12  * @e sub-project:  Options
13  * @e \$Revision: 56186 $   @e \$Date: 2011-07-08 15:35:23 -0600 (Fri, 08 Jul 2011) $
14  */
15 /*****************************************************************************
16  *
17  * Copyright (C) 2012 Advanced Micro Devices, Inc.
18  * All rights reserved.
19  *
20  * Redistribution and use in source and binary forms, with or without
21  * modification, are permitted provided that the following conditions are met:
22  *     * Redistributions of source code must retain the above copyright
23  *       notice, this list of conditions and the following disclaimer.
24  *     * Redistributions in binary form must reproduce the above copyright
25  *       notice, this list of conditions and the following disclaimer in the
26  *       documentation and/or other materials provided with the distribution.
27  *     * Neither the name of Advanced Micro Devices, Inc. nor the names of
28  *       its contributors may be used to endorse or promote products derived
29  *       from this software without specific prior written permission.
30  *
31  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
32  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
33  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34  * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
35  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
36  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
37  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
38  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
39  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
40  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41  *
42  *
43  ***************************************************************************/
44
45 #ifndef _OPTION_CPU_CORELEVELING_INSTALL_H_
46 #define _OPTION_CPU_CORELEVELING_INSTALL_H_
47
48
49 /*  This option is designed to be included into the platform solution install
50  *  file. The platform solution install file will define the options status.
51  *  Check to validate the definition
52  */
53 #define OPTION_CPU_CORE_LEVELING_FEAT
54 #define F10_REVE_CPU_CORELEVELING_SUPPORT
55 #define F10_REVD_CPU_CORELEVELING_SUPPORT
56 #define F10_REVC_CPU_CORELEVELING_SUPPORT
57 #define F15_OR_CPU_CORELEVELING_SUPPORT
58 #define F15_TN_CPU_CORELEVELING_SUPPORT
59
60 #if OPTION_CPU_CORELEVLING == TRUE
61   #if (AGESA_ENTRY_INIT_EARLY == TRUE)
62     extern CONST CPU_FEATURE_DESCRIPTOR ROMDATA CpuFeatureCoreLeveling;
63
64     // Family 10h
65     #if OPTION_FAMILY10H == TRUE
66       #undef OPTION_CPU_CORE_LEVELING_FEAT
67       #define OPTION_CPU_CORE_LEVELING_FEAT &CpuFeatureCoreLeveling,
68       #if OPTION_FAMILY10H_HY == TRUE
69         extern CONST CPU_CORE_LEVELING_FAMILY_SERVICES ROMDATA F10RevDCoreLeveling;
70         #undef F10_REVD_CPU_CORELEVELING_SUPPORT
71         #define F10_REVD_CPU_CORELEVELING_SUPPORT {AMD_FAMILY_10_HY, &F10RevDCoreLeveling},
72       #endif
73
74       #if (OPTION_FAMILY10H_RB == TRUE) || (OPTION_FAMILY10H_BL == TRUE) || (OPTION_FAMILY10H_DA == TRUE)
75         extern CONST CPU_CORE_LEVELING_FAMILY_SERVICES ROMDATA F10RevCCoreLeveling;
76         #undef F10_REVC_CPU_CORELEVELING_SUPPORT
77         #define F10_REVC_CPU_CORELEVELING_SUPPORT {AMD_FAMILY_10_RB | AMD_FAMILY_10_BL | AMD_FAMILY_10_DA, &F10RevCCoreLeveling},
78       #endif
79
80       #if (OPTION_FAMILY10H_PH == TRUE)
81         extern CONST CPU_CORE_LEVELING_FAMILY_SERVICES ROMDATA F10RevECoreLeveling;
82         #undef F10_REVE_CPU_CORELEVELING_SUPPORT
83         #define F10_REVE_CPU_CORELEVELING_SUPPORT {AMD_FAMILY_10_PH, &F10RevECoreLeveling},
84       #endif
85     #endif
86     // Family 15h
87     #if OPTION_FAMILY15H == TRUE
88       #undef OPTION_CPU_CORE_LEVELING_FEAT
89       #define OPTION_CPU_CORE_LEVELING_FEAT &CpuFeatureCoreLeveling,
90
91       #if (OPTION_FAMILY15H_OR == TRUE)
92         extern CONST CPU_CORE_LEVELING_FAMILY_SERVICES ROMDATA F15OrCoreLeveling;
93         #undef F15_OR_CPU_CORELEVELING_SUPPORT
94         #define F15_OR_CPU_CORELEVELING_SUPPORT {AMD_FAMILY_15_OR, &F15OrCoreLeveling},
95       #endif
96       #if (OPTION_FAMILY15H_TN == TRUE)
97         extern CONST CPU_CORE_LEVELING_FAMILY_SERVICES ROMDATA F15TnCoreLeveling;
98         #undef F15_TN_CPU_CORELEVELING_SUPPORT
99         #define F15_TN_CPU_CORELEVELING_SUPPORT {AMD_FAMILY_15_TN, &F15TnCoreLeveling},
100       #endif
101     #endif
102   #endif
103 #endif
104
105 CONST CPU_SPECIFIC_SERVICES_XLAT ROMDATA CoreLevelingFamilyServiceArray[] =
106 {
107   F15_TN_CPU_CORELEVELING_SUPPORT
108   F15_OR_CPU_CORELEVELING_SUPPORT
109   F10_REVE_CPU_CORELEVELING_SUPPORT
110   F10_REVD_CPU_CORELEVELING_SUPPORT
111   F10_REVC_CPU_CORELEVELING_SUPPORT
112   {0, NULL}
113 };
114 CONST CPU_FAMILY_SUPPORT_TABLE ROMDATA CoreLevelingFamilyServiceTable =
115 {
116   (sizeof (CoreLevelingFamilyServiceArray) / sizeof (CPU_SPECIFIC_SERVICES_XLAT)),
117   &CoreLevelingFamilyServiceArray[0]
118 };
119
120 #endif  // _OPTION_CPU_CORELEVELING_INSTALL_H_